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powerpc/perf: Add basic assembly code to read BHRB entries on POWER8
This patch adds the basic assembly code to read BHRB buffer. BHRB entries are valid only after a PMU interrupt has happened (when MMCR0[PMAO]=1) and BHRB has been freezed. BHRB read should not be attempted when it is still enabled (MMCR0[PMAE]=1) and getting updated, as this can produce non-deterministic results. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Anshuman Khandual
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Benjamin Herrenschmidt
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Apr 26, 2013
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/* | ||
* Basic assembly code to read BHRB entries | ||
* | ||
* Copyright 2013 Anshuman Khandual, IBM Corporation. | ||
* | ||
* This program is free software; you can redistribute it and/or | ||
* modify it under the terms of the GNU General Public License | ||
* as published by the Free Software Foundation; either version | ||
* 2 of the License, or (at your option) any later version. | ||
*/ | ||
#include <asm/ppc_asm.h> | ||
#include <asm/ppc-opcode.h> | ||
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.text | ||
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.balign 8 | ||
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/* r3 = n (where n = [0-31]) | ||
* The maximum number of BHRB entries supported with PPC_MFBHRBE instruction | ||
* is 1024. We have limited number of table entries here as POWER8 implements | ||
* 32 BHRB entries. | ||
*/ | ||
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/* .global read_bhrb */ | ||
_GLOBAL(read_bhrb) | ||
cmpldi r3,31 | ||
bgt 1f | ||
ld r4,bhrb_table@got(r2) | ||
sldi r3,r3,3 | ||
add r3,r4,r3 | ||
mtctr r3 | ||
bctr | ||
1: li r3,0 | ||
blr | ||
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#define MFBHRB_TABLE1(n) PPC_MFBHRBE(R3,n); blr | ||
#define MFBHRB_TABLE2(n) MFBHRB_TABLE1(n); MFBHRB_TABLE1(n+1) | ||
#define MFBHRB_TABLE4(n) MFBHRB_TABLE2(n); MFBHRB_TABLE2(n+2) | ||
#define MFBHRB_TABLE8(n) MFBHRB_TABLE4(n); MFBHRB_TABLE4(n+4) | ||
#define MFBHRB_TABLE16(n) MFBHRB_TABLE8(n); MFBHRB_TABLE8(n+8) | ||
#define MFBHRB_TABLE32(n) MFBHRB_TABLE16(n); MFBHRB_TABLE16(n+16) | ||
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bhrb_table: | ||
MFBHRB_TABLE32(0) |