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yaml
---
r: 39706
b: refs/heads/master
c: 107d5a7
h: refs/heads/master
v: v3
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Brent Casavant authored and Linus Torvalds committed Oct 17, 2006
1 parent 969799f commit 73b76bc
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Showing 3 changed files with 24 additions and 27 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 4d99bfac9d5ce53b383d3c8279b917050be4e06c
refs/heads/master: 107d5a72f2c6a6819b66eebcb0281c7a67b6baaa
13 changes: 6 additions & 7 deletions trunk/drivers/sn/Kconfig
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Expand Up @@ -7,16 +7,15 @@ menu "SN Devices"

config SGI_IOC4
tristate "SGI IOC4 Base IO support"
depends on MMTIMER
default m
---help---
This option enables basic support for the SGI IOC4-based Base IO
controller card. This option does not enable any specific
functions on such a card, but provides necessary infrastructure
for other drivers to utilize.
This option enables basic support for the IOC4 chip on certain
SGI IO controller cards (IO9, IO10, and PCI-RT). This option
does not enable any specific functions on such a card, but provides
necessary infrastructure for other drivers to utilize.

If you have an SGI Altix with an IOC4-based
I/O controller say Y. Otherwise say N.
If you have an SGI Altix with an IOC4-based card say Y.
Otherwise say N.

config SGI_IOC3
tristate "SGI IOC3 Base IO support"
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36 changes: 17 additions & 19 deletions trunk/drivers/sn/ioc4.c
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Expand Up @@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
*/

/* This file contains the master driver module for use by SGI IOC4 subdrivers.
Expand All @@ -29,9 +29,9 @@
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioc4.h>
#include <linux/mmtimer.h>
#include <linux/rtc.h>
#include <linux/ktime.h>
#include <linux/mutex.h>
#include <linux/time.h>
#include <asm/sn/addrs.h>
#include <asm/sn/clksupport.h>
#include <asm/sn/shub_mmr.h>
Expand All @@ -43,7 +43,7 @@
/* Tweakable values */

/* PCI bus speed detection/calibration */
#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
#define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
#define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
#define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
#define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
Expand Down Expand Up @@ -143,11 +143,11 @@ ioc4_unregister_submodule(struct ioc4_submodule *is)
static void
ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{
extern unsigned long sn_rtc_cycles_per_second;
union ioc4_int_out int_out;
union ioc4_gpcr gpcr;
unsigned int state, last_state = 1;
uint64_t start = 0, end, period;
struct timespec start_ts, end_ts;
uint64_t start, end, period;
unsigned int count = 0;

/* Enable output */
Expand Down Expand Up @@ -175,30 +175,28 @@ ioc4_clock_calibrate(struct ioc4_driver_data *idd)
if (!last_state && state) {
count++;
if (count == IOC4_CALIBRATE_END) {
end = rtc_time();
ktime_get_ts(&end_ts);
break;
} else if (count == IOC4_CALIBRATE_DISCARD)
start = rtc_time();
ktime_get_ts(&start_ts);
}
last_state = state;
} while (1);

/* Calculation rearranged to preserve intermediate precision.
* Logically:
* 1. "end - start" gives us number of RTC cycles over all the
* square wave cycles measured.
* 2. Divide by number of square wave cycles to get number of
* RTC cycles per square wave cycle.
* 1. "end - start" gives us the measurement period over all
* the square wave cycles.
* 2. Divide by number of square wave cycles to get the period
* of a square wave cycle.
* 3. Divide by 2*(int_out.fields.count+1), which is the formula
* by which the IOC4 generates the square wave, to get the
* number of RTC cycles per IOC4 INT_OUT count.
* 4. Divide by sn_rtc_cycles_per_second to get seconds per
* count.
* 5. Multiply by 1E9 to get nanoseconds per count.
* period of an IOC4 INT_OUT count.
*/
period = ((end - start) * 1000000000) /
(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1)
* sn_rtc_cycles_per_second);
end = end_ts.tv_sec * NSEC_PER_SEC + end_ts.tv_nsec;
start = start_ts.tv_sec * NSEC_PER_SEC + start_ts.tv_nsec;
period = (end - start) /
(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));

/* Bounds check the result. */
if (period > IOC4_CALIBRATE_LOW_LIMIT ||
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