---

yaml
---
r: 245726
b: refs/heads/master
c: 660e34c
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 08b5d06ec6cff1d952f13cfcffcbf41ff0ce2c86
+refs/heads/master: 660e34cebf0a11d54f2d5dd8838607452355f321

trunk/CREDITS

@@ -1677,7 +1677,7 @@ W: http://www.codemonkey.org.uk
 D: Assorted VIA x86 support.
 D: 2.5 AGPGART overhaul.
 D: CPUFREQ maintenance.
-D: Fedora kernel maintenance.
+D: Fedora kernel maintainence.
 D: Misc/Other.
 S: 314 Littleton Rd, Westford, MA 01886, USA
 
@@ -3211,7 +3211,7 @@ N: James Simmons
 E: jsimmons@infradead.org
 E: jsimmons@users.sf.net 
 D: Frame buffer device maintainer
-D: input layer development
+D: input layer developement 
 D: tty/console layer
 D: various mipsel devices 
 S: 115 Carmel Avenue 
@@ -3290,7 +3290,7 @@ S: USA
 N: Manfred Spraul
 E: manfred@colorfullife.com
 W: http://www.colorfullife.com/~manfred
-D: Lots of tiny hacks. Larger improvements to SysV IPC msg,
+D: Lots of tiny hacks. Larger improvments to SysV IPC msg,
 D: slab, pipe, select.
 S: 71701 Schwieberdingen
 S: Germany

trunk/Documentation/00-INDEX

@@ -328,6 +328,8 @@ sysrq.txt
 	- info on the magic SysRq key.
 telephony/
 	- directory with info on telephony (e.g. voice over IP) support.
+uml/
+	- directory with information about User Mode Linux.
 unicode.txt
 	- info on the Unicode character/font mapping used in Linux.
 unshare.txt

trunk/Documentation/ABI/testing/sysfs-bus-css

@@ -29,7 +29,7 @@ Contact:	Cornelia Huck <cornelia.huck@de.ibm.com>
 		linux-s390@vger.kernel.org
 Description:	Contains the PIM/PAM/POM values, as reported by the
 		channel subsystem when last queried by the common I/O
-		layer (this implies that this attribute is not necessarily
+		layer (this implies that this attribute is not neccessarily
 		in sync with the values current in the channel subsystem).
 		Note: This is an I/O-subchannel specific attribute.
 Users:		s390-tools, HAL

trunk/Documentation/ABI/testing/sysfs-class-led

@@ -33,5 +33,5 @@ Contact:	Richard Purdie <rpurdie@rpsys.net>
 Description:
 		Invert the LED on/off state. This parameter is specific to
 		gpio and backlight triggers. In case of the backlight trigger,
-		it is useful when driving a LED which is intended to indicate
+		it is usefull when driving a LED which is intended to indicate
 		a device in a standby like state.

trunk/Documentation/ABI/testing/sysfs-devices-system-cpu

@@ -183,21 +183,21 @@ Description:	Discover and change clock speed of CPUs
 		to learn how to control the knobs.
 
 
-What:		/sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}
-Date:		August 2008
+What:      /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
+Date:      August 2008
 KernelVersion:	2.6.27
-Contact:	discuss@x86-64.org
-Description:	Disable L3 cache indices
-
-		These files exist in every CPU's cache/index3 directory. Each
-		cache_disable_{0,1} file corresponds to one disable slot which
-		can be used to disable a cache index. Reading from these files
-		on a processor with this functionality will return the currently
-		disabled index for that node. There is one L3 structure per
-		node, or per internal node on MCM machines. Writing a valid
-		index to one of these files will cause the specificed cache
-		index to be disabled.
-
-		All AMD processors with L3 caches provide this functionality.
-		For details, see BKDGs at
-		http://developer.amd.com/documentation/guides/Pages/default.aspx
+Contact:	mark.langsdorf@amd.com
+Description:	These files exist in every cpu's cache index directories.
+		There are currently 2 cache_disable_# files in each
+		directory.  Reading from these files on a supported
+		processor will return that cache disable index value
+		for that processor and node.  Writing to one of these
+		files will cause the specificed cache index to be disabled.
+
+		Currently, only AMD Family 10h Processors support cache index
+		disable, and only for their L3 caches.  See the BIOS and
+		Kernel Developer's Guide at
+		http://support.amd.com/us/Embedded_TechDocs/31116-Public-GH-BKDG_3-28_5-28-09.pdf	
+		for formatting information and other details on the
+		cache index disable.
+Users:    joachim.deguara@amd.com

trunk/Documentation/ABI/testing/sysfs-power

@@ -158,17 +158,3 @@ Description:
 		successful, will make the kernel abort a subsequent transition
 		to a sleep state if any wakeup events are reported after the
 		write has returned.
-
-What:		/sys/power/reserved_size
-Date:		May 2011
-Contact:	Rafael J. Wysocki <rjw@sisk.pl>
-Description:
-		The /sys/power/reserved_size file allows user space to control
-		the amount of memory reserved for allocations made by device
-		drivers during the "device freeze" stage of hibernation.  It can
-		be written a string representing a non-negative integer that
-		will be used as the amount of memory to reserve for allocations
-		made by device drivers' "freeze" callbacks, in bytes.
-
-		Reading from this file will display the current value, which is
-		set to 1 MB by default.

trunk/Documentation/DocBook/dvb/dvbproperty.xml

@@ -40,7 +40,7 @@
 
 			<para>Central frequency of the channel.</para>
 
-			<para>For ISDB-T the channels are usually transmitted with an offset of 143kHz. E.g. a
+			<para>For ISDB-T the channels are usally transmitted with an offset of 143kHz. E.g. a
 				valid frequncy could be 474143 kHz. The stepping is bound to the bandwidth of
 				the channel which is 6MHz.</para>
 

trunk/Documentation/DocBook/dvb/frontend.xml

@@ -139,7 +139,7 @@ consistently to the DiSEqC commands as described in the DiSEqC spec.</para>
 <section id="frontend_sec_tone">
 <title>SEC continuous tone</title>
 
-<para>The continuous 22KHz tone is usually used with non-DiSEqC capable LNBs to switch the
+<para>The continous 22KHz tone is usually used with non-DiSEqC capable LNBs to switch the
 high/low band of a dual-band LNB. When using DiSEqC epuipment this voltage has to
 be switched consistently to the DiSEqC commands as described in the DiSEqC
 spec.</para>

trunk/Documentation/DocBook/genericirq.tmpl

@@ -191,8 +191,8 @@
 	<para>
 	Whenever an interrupt triggers, the lowlevel arch code calls into
 	the generic interrupt code by calling desc->handle_irq().
-	This highlevel IRQ handling function only uses desc->irq_data.chip
-	primitives referenced by the assigned chip descriptor structure.
+	This highlevel IRQ handling function only uses desc->chip primitives
+	referenced by the assigned chip descriptor structure.
 	</para>
     </sect1>
     <sect1 id="Highlevel_Driver_API">
@@ -206,11 +206,11 @@
 	  <listitem><para>enable_irq()</para></listitem>
 	  <listitem><para>disable_irq_nosync() (SMP only)</para></listitem>
 	  <listitem><para>synchronize_irq() (SMP only)</para></listitem>
-	  <listitem><para>irq_set_irq_type()</para></listitem>
-	  <listitem><para>irq_set_irq_wake()</para></listitem>
-	  <listitem><para>irq_set_handler_data()</para></listitem>
-	  <listitem><para>irq_set_chip()</para></listitem>
-	  <listitem><para>irq_set_chip_data()</para></listitem>
+	  <listitem><para>set_irq_type()</para></listitem>
+	  <listitem><para>set_irq_wake()</para></listitem>
+	  <listitem><para>set_irq_data()</para></listitem>
+	  <listitem><para>set_irq_chip()</para></listitem>
+	  <listitem><para>set_irq_chip_data()</para></listitem>
           </itemizedlist>
 	  See the autogenerated function documentation for details.
 	</para>
@@ -225,8 +225,6 @@
 	  <listitem><para>handle_fasteoi_irq</para></listitem>
 	  <listitem><para>handle_simple_irq</para></listitem>
 	  <listitem><para>handle_percpu_irq</para></listitem>
-	  <listitem><para>handle_edge_eoi_irq</para></listitem>
-	  <listitem><para>handle_bad_irq</para></listitem>
 	  </itemizedlist>
 	  The interrupt flow handlers (either predefined or architecture
 	  specific) are assigned to specific interrupts by the architecture
@@ -243,13 +241,13 @@
 		<programlisting>
 default_enable(struct irq_data *data)
 {
-	desc->irq_data.chip->irq_unmask(data);
+	desc->chip->irq_unmask(data);
 }
 
 default_disable(struct irq_data *data)
 {
 	if (!delay_disable(data))
-		desc->irq_data.chip->irq_mask(data);
+		desc->chip->irq_mask(data);
 }
 
 default_ack(struct irq_data *data)
@@ -286,9 +284,9 @@ noop(struct irq_data *data))
 		<para>
 		The following control flow is implemented (simplified excerpt):
 		<programlisting>
-desc->irq_data.chip->irq_mask_ack();
-handle_irq_event(desc->action);
-desc->irq_data.chip->irq_unmask();
+desc->chip->irq_mask();
+handle_IRQ_event(desc->action);
+desc->chip->irq_unmask();
 		</programlisting>
 		</para>
 	    </sect3>
@@ -302,8 +300,8 @@ desc->irq_data.chip->irq_unmask();
 		<para>
 		The following control flow is implemented (simplified excerpt):
 		<programlisting>
-handle_irq_event(desc->action);
-desc->irq_data.chip->irq_eoi();
+handle_IRQ_event(desc->action);
+desc->chip->irq_eoi();
 		</programlisting>
 		</para>
 	    </sect3>
@@ -317,17 +315,17 @@ desc->irq_data.chip->irq_eoi();
 		The following control flow is implemented (simplified excerpt):
 		<programlisting>
 if (desc->status &amp; running) {
-	desc->irq_data.chip->irq_mask_ack();
+	desc->chip->irq_mask();
 	desc->status |= pending | masked;
 	return;
 }
-desc->irq_data.chip->irq_ack();
+desc->chip->irq_ack();
 desc->status |= running;
 do {
 	if (desc->status &amp; masked)
-		desc->irq_data.chip->irq_unmask();
+		desc->chip->irq_unmask();
 	desc->status &amp;= ~pending;
-	handle_irq_event(desc->action);
+	handle_IRQ_event(desc->action);
 } while (status &amp; pending);
 desc->status &amp;= ~running;
 		</programlisting>
@@ -346,7 +344,7 @@ desc->status &amp;= ~running;
 		<para>
 		The following control flow is implemented (simplified excerpt):
 		<programlisting>
-handle_irq_event(desc->action);
+handle_IRQ_event(desc->action);
 		</programlisting>
 		</para>
    	    </sect3>
@@ -364,29 +362,12 @@ handle_irq_event(desc->action);
 		<para>
 		The following control flow is implemented (simplified excerpt):
 		<programlisting>
-if (desc->irq_data.chip->irq_ack)
-	desc->irq_data.chip->irq_ack();
-handle_irq_event(desc->action);
-if (desc->irq_data.chip->irq_eoi)
-        desc->irq_data.chip->irq_eoi();
+handle_IRQ_event(desc->action);
+if (desc->chip->irq_eoi)
+        desc->chip->irq_eoi();
 		</programlisting>
 		</para>
    	    </sect3>
-	    <sect3 id="EOI_Edge_IRQ_flow_handler">
-	 	<title>EOI Edge IRQ flow handler</title>
-		<para>
-		handle_edge_eoi_irq provides an abnomination of the edge
-		handler which is solely used to tame a badly wreckaged
-		irq controller on powerpc/cell.
-		</para>
-   	    </sect3>
-	    <sect3 id="BAD_IRQ_flow_handler">
-	 	<title>Bad IRQ flow handler</title>
-		<para>
-		handle_bad_irq is used for spurious interrupts which
-		have no real handler assigned..
-		</para>
-   	    </sect3>
 	</sect2>
 	<sect2 id="Quirks_and_optimizations">
 	<title>Quirks and optimizations</title>
@@ -429,7 +410,6 @@ if (desc->irq_data.chip->irq_eoi)
 	  <listitem><para>irq_mask_ack() - Optional, recommended for performance</para></listitem>
 	  <listitem><para>irq_mask()</para></listitem>
 	  <listitem><para>irq_unmask()</para></listitem>
-	  <listitem><para>irq_eoi() - Optional, required for eoi flow handlers</para></listitem>
 	  <listitem><para>irq_retrigger() - Optional</para></listitem>
 	  <listitem><para>irq_set_type() - Optional</para></listitem>
 	  <listitem><para>irq_set_wake() - Optional</para></listitem>
@@ -444,24 +424,32 @@ if (desc->irq_data.chip->irq_eoi)
   <chapter id="doirq">
      <title>__do_IRQ entry point</title>
      <para>
-	The original implementation __do_IRQ() was an alternative entry
-	point for all types of interrupts. It not longer exists.
+ 	The original implementation __do_IRQ() is an alternative entry
+	point for all types of interrupts.
      </para>
      <para>
 	This handler turned out to be not suitable for all
 	interrupt hardware and was therefore reimplemented with split
-	functionality for edge/level/simple/percpu interrupts. This is not
+	functionality for egde/level/simple/percpu interrupts. This is not
 	only a functional optimization. It also shortens code paths for
 	interrupts.
       </para>
+      <para>
+	To make use of the split implementation, replace the call to
+	__do_IRQ by a call to desc->handle_irq() and associate
+        the appropriate handler function to desc->handle_irq().
+	In most cases the generic handler implementations should
+	be sufficient.
+     </para>
   </chapter>
 
   <chapter id="locking">
      <title>Locking on SMP</title>
      <para>
 	The locking of chip registers is up to the architecture that
-	defines the chip primitives. The per-irq structure is
-	protected via desc->lock, by the generic layer.
+	defines the chip primitives. There is a chip->lock field that can be used
+	for serialization, but the generic layer does not touch it. The per-irq
+	structure is protected via desc->lock, by the generic layer.
      </para>
   </chapter>
   <chapter id="structs">

trunk/Documentation/DocBook/kernel-locking.tmpl

@@ -1763,7 +1763,7 @@ as it would be on UP.
 There is a furthur optimization possible here: remember our original
 cache code, where there were no reference counts and the caller simply
 held the lock whenever using the object?  This is still possible: if
-you hold the lock, no one can delete the object, so you don't need to
+you hold the lock, noone can delete the object, so you don't need to
 get and put the reference count.
 </para>
 

trunk/Documentation/DocBook/libata.tmpl

@@ -1032,7 +1032,7 @@ and other resources, etc.
 	   <listitem>
 	   <para>
 	   This is indicated by ICRC bit in the ERROR register and
-	   means that corruption occurred during data transfer.  Up to
+	   means that corruption occurred during data transfer.  Upto
 	   ATA/ATAPI-7, the standard specifies that this bit is only
 	   applicable to UDMA transfers but ATA/ATAPI-8 draft revision
 	   1f says that the bit may be applicable to multiword DMA and
@@ -1045,10 +1045,10 @@ and other resources, etc.
 	   <term>ABRT error during data transfer or on completion</term>
 	   <listitem>
 	   <para>
-	   Up to ATA/ATAPI-7, the standard specifies that ABRT could be
+	   Upto ATA/ATAPI-7, the standard specifies that ABRT could be
 	   set on ICRC errors and on cases where a device is not able
 	   to complete a command.  Combined with the fact that MWDMA
-	   and PIO transfer errors aren't allowed to use ICRC bit up to
+	   and PIO transfer errors aren't allowed to use ICRC bit upto
 	   ATA/ATAPI-7, it seems to imply that ABRT bit alone could
 	   indicate tranfer errors.
 	   </para>
@@ -1122,7 +1122,7 @@ and other resources, etc.
 	<para>
 	Depending on commands, not all STATUS/ERROR bits are
 	applicable.  These non-applicable bits are marked with
-	&quot;na&quot; in the output descriptions but up to ATA/ATAPI-7
+	&quot;na&quot; in the output descriptions but upto ATA/ATAPI-7
 	no definition of &quot;na&quot; can be found.  However,
 	ATA/ATAPI-8 draft revision 1f describes &quot;N/A&quot; as
 	follows.
@@ -1507,7 +1507,7 @@ and other resources, etc.
 
 	<listitem>
 	<para>
-	CHS set up with INITIALIZE DEVICE PARAMETERS (seldom used)
+	CHS set up with INITIALIZE DEVICE PARAMETERS (seldomly used)
 	</para>
 	</listitem>
 

trunk/Documentation/DocBook/media-entities.tmpl

@@ -294,7 +294,6 @@
 <!ENTITY sub-srggb10 SYSTEM "v4l/pixfmt-srggb10.xml">
 <!ENTITY sub-srggb8 SYSTEM "v4l/pixfmt-srggb8.xml">
 <!ENTITY sub-y10 SYSTEM "v4l/pixfmt-y10.xml">
-<!ENTITY sub-y12 SYSTEM "v4l/pixfmt-y12.xml">
 <!ENTITY sub-pixfmt SYSTEM "v4l/pixfmt.xml">
 <!ENTITY sub-cropcap SYSTEM "v4l/vidioc-cropcap.xml">
 <!ENTITY sub-dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml">