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yaml
---
r: 233223
b: refs/heads/master
c: 0c7fbbe
h: refs/heads/master
i:
  233221: 91bc005
  233219: 9a227ac
  233215: aee49e2
v: v3
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Yu Tang authored and Eric Miao committed Feb 9, 2011
1 parent 8b6029a commit 74b4a5c
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Showing 10 changed files with 44 additions and 85 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 66e1cfe6d52c69d317e9df76ebc8538a34af0d51
refs/heads/master: 0c7fbbe1a15e419eb2f1a687444330c4016fdb8f
2 changes: 1 addition & 1 deletion trunk/arch/arm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -1391,7 +1391,7 @@ config AEABI

config OABI_COMPAT
bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
depends on AEABI && EXPERIMENTAL
default y
help
This option preserves the old syscall interface along with the
Expand Down
38 changes: 12 additions & 26 deletions trunk/arch/arm/kernel/head.S
Original file line number Diff line number Diff line change
Expand Up @@ -391,7 +391,6 @@ ENDPROC(__turn_mmu_on)


#ifdef CONFIG_SMP_ON_UP
__INIT
__fixup_smp:
and r3, r9, #0x000f0000 @ architecture version
teq r3, #0x000f0000 @ CPU ID supported?
Expand All @@ -416,7 +415,18 @@ __fixup_smp_on_up:
sub r3, r0, r3
add r4, r4, r3
add r5, r5, r3
b __do_fixup_smp_on_up
2: cmp r4, r5
movhs pc, lr
ldmia r4!, {r0, r6}
ARM( str r6, [r0, r3] )
THUMB( add r0, r0, r3 )
#ifdef __ARMEB__
THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
#endif
THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
THUMB( strh r6, [r0] )
b 2b
ENDPROC(__fixup_smp)

.align
Expand All @@ -430,31 +440,7 @@ smp_on_up:
ALT_SMP(.long 1)
ALT_UP(.long 0)
.popsection
#endif

.text
__do_fixup_smp_on_up:
cmp r4, r5
movhs pc, lr
ldmia r4!, {r0, r6}
ARM( str r6, [r0, r3] )
THUMB( add r0, r0, r3 )
#ifdef __ARMEB__
THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
#endif
THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
THUMB( strh r6, [r0] )
b __do_fixup_smp_on_up
ENDPROC(__do_fixup_smp_on_up)

ENTRY(fixup_smp)
stmfd sp!, {r4 - r6, lr}
mov r4, r0
add r5, r0, r1
mov r3, #0
bl __do_fixup_smp_on_up
ldmfd sp!, {r4 - r6, pc}
ENDPROC(fixup_smp)

#include "head-common.S"
44 changes: 18 additions & 26 deletions trunk/arch/arm/kernel/hw_breakpoint.c
Original file line number Diff line number Diff line change
Expand Up @@ -137,10 +137,11 @@ static u8 get_debug_arch(void)
u32 didr;

/* Do we implement the extended CPUID interface? */
if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),
"CPUID feature registers not supported. "
"Assuming v6 debug is present.\n"))
if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {
pr_warning("CPUID feature registers not supported. "
"Assuming v6 debug is present.\n");
return ARM_DEBUG_ARCH_V6;
}

ARM_DBG_READ(c0, 0, didr);
return (didr >> 16) & 0xf;
Expand All @@ -151,12 +152,6 @@ u8 arch_get_debug_arch(void)
return debug_arch;
}

static int debug_arch_supported(void)
{
u8 arch = get_debug_arch();
return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;
}

/* Determine number of BRP register available. */
static int get_num_brp_resources(void)
{
Expand Down Expand Up @@ -273,9 +268,6 @@ static int enable_monitor_mode(void)

int hw_breakpoint_slots(int type)
{
if (!debug_arch_supported())
return 0;

/*
* We can be called early, so don't rely on
* our static variables being initialised.
Expand Down Expand Up @@ -842,11 +834,11 @@ static void reset_ctrl_regs(void *unused)

/*
* v7 debug contains save and restore registers so that debug state
* can be maintained across low-power modes without leaving the debug
* logic powered up. It is IMPLEMENTATION DEFINED whether we can access
* the debug registers out of reset, so we must unlock the OS Lock
* Access Register to avoid taking undefined instruction exceptions
* later on.
* can be maintained across low-power modes without leaving
* the debug logic powered up. It is IMPLEMENTATION DEFINED whether
* we can write to the debug registers out of reset, so we must
* unlock the OS Lock Access Register to avoid taking undefined
* instruction exceptions later on.
*/
if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
/*
Expand Down Expand Up @@ -890,7 +882,7 @@ static int __init arch_hw_breakpoint_init(void)

debug_arch = get_debug_arch();

if (!debug_arch_supported()) {
if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) {
pr_info("debug architecture 0x%x unsupported.\n", debug_arch);
return 0;
}
Expand All @@ -907,18 +899,18 @@ static int __init arch_hw_breakpoint_init(void)
pr_info("%d breakpoint(s) reserved for watchpoint "
"single-step.\n", core_num_reserved_brps);

/*
* Reset the breakpoint resources. We assume that a halting
* debugger will leave the world in a nice state for us.
*/
on_each_cpu(reset_ctrl_regs, NULL, 1);

ARM_DBG_READ(c1, 0, dscr);
if (dscr & ARM_DSCR_HDBGEN) {
max_watchpoint_len = 4;
pr_warning("halting debug mode enabled. Assuming maximum "
"watchpoint size of %u bytes.", max_watchpoint_len);
"watchpoint size of 4 bytes.");
} else {
/*
* Reset the breakpoint resources. We assume that a halting
* debugger will leave the world in a nice state for us.
*/
smp_call_function(reset_ctrl_regs, NULL, 1);
reset_ctrl_regs(NULL);

/* Work out the maximum supported watchpoint length. */
max_watchpoint_len = get_max_wp_len();
pr_info("maximum watchpoint size is %u bytes.\n",
Expand Down
22 changes: 1 addition & 21 deletions trunk/arch/arm/kernel/module.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,6 @@

#include <asm/pgtable.h>
#include <asm/sections.h>
#include <asm/smp_plat.h>
#include <asm/unwind.h>

#ifdef CONFIG_XIP_KERNEL
Expand Down Expand Up @@ -269,28 +268,12 @@ struct mod_unwind_map {
const Elf_Shdr *txt_sec;
};

static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
const Elf_Shdr *sechdrs, const char *name)
{
const Elf_Shdr *s, *se;
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;

for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
if (strcmp(name, secstrs + s->sh_name) == 0)
return s;

return NULL;
}

extern void fixup_smp(const void *, unsigned long);

int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
struct module *mod)
{
const Elf_Shdr * __maybe_unused s = NULL;
#ifdef CONFIG_ARM_UNWIND
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
struct mod_unwind_map maps[ARM_SEC_MAX];
int i;

Expand Down Expand Up @@ -332,9 +315,6 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
maps[i].txt_sec->sh_addr,
maps[i].txt_sec->sh_size);
#endif
s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
if (s && !is_smp())
fixup_smp((void *)s->sh_addr, s->sh_size);
return 0;
}

Expand Down
2 changes: 1 addition & 1 deletion trunk/arch/arm/kernel/perf_event.c
Original file line number Diff line number Diff line change
Expand Up @@ -700,7 +700,7 @@ user_backtrace(struct frame_tail __user *tail,
* Frame pointers should strictly progress back up the stack
* (towards higher addresses).
*/
if (tail + 1 >= buftail.fp)
if (tail >= buftail.fp)
return NULL;

return buftail.fp - 1;
Expand Down
3 changes: 0 additions & 3 deletions trunk/arch/arm/mach-sa1100/collie.c
Original file line number Diff line number Diff line change
Expand Up @@ -241,9 +241,6 @@ static struct locomo_platform_data locomo_info = {
struct platform_device collie_locomo_device = {
.name = "locomo",
.id = 0,
.dev = {
.platform_data = &locomo_info,
},
.num_resources = ARRAY_SIZE(locomo_resources),
.resource = locomo_resources,
};
Expand Down
6 changes: 3 additions & 3 deletions trunk/arch/arm/mm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -405,7 +405,7 @@ config CPU_V6
config CPU_32v6K
bool "Support ARM V6K processor extensions" if !SMP
depends on CPU_V6 || CPU_V7
default y if SMP
default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
help
Say Y here if your ARMv6 processor supports the 'K' extension.
This enables the kernel to use some instructions not present
Expand All @@ -416,7 +416,7 @@ config CPU_32v6K
# ARMv7
config CPU_V7
bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
select CPU_32v6K
select CPU_32v6K if !ARCH_OMAP2
select CPU_32v7
select CPU_ABRT_EV7
select CPU_PABRT_V7
Expand Down Expand Up @@ -644,7 +644,7 @@ config ARM_THUMBEE

config SWP_EMULATE
bool "Emulate SWP/SWPB instructions"
depends on !CPU_USE_DOMAINS && CPU_V7 && !CPU_V6
depends on CPU_V7 && !CPU_V6
select HAVE_PROC_CPU if PROC_FS
default y if SMP
help
Expand Down
2 changes: 1 addition & 1 deletion trunk/arch/arm/oprofile/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ static struct frame_tail* user_backtrace(struct frame_tail *tail)

/* frame pointers should strictly progress back up the stack
* (towards higher addresses) */
if (tail + 1 >= buftail[0].fp)
if (tail >= buftail[0].fp)
return NULL;

return buftail[0].fp-1;
Expand Down
8 changes: 6 additions & 2 deletions trunk/arch/arm/plat-pxa/mfp.c
Original file line number Diff line number Diff line change
Expand Up @@ -139,10 +139,11 @@ static const unsigned long mfpr_edge[] = {
#define mfp_configured(p) ((p)->config != -1)

/*
* perform a read-back of any MFPR register to make sure the
* perform a read-back of any valid MFPR register to make sure the
* previous writings are finished
*/
#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
static unsigned long mfpr_off_readback;
#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)

static inline void __mfp_config_run(struct mfp_pin *p)
{
Expand Down Expand Up @@ -248,6 +249,9 @@ void __init mfp_init_addr(struct mfp_addr_map *map)

spin_lock_irqsave(&mfp_spin_lock, flags);

/* mfp offset for readback */
mfpr_off_readback = map[0].offset;

for (p = map; p->start != MFP_PIN_INVALID; p++) {
offset = p->offset;
i = p->start;
Expand Down

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