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yaml
---
r: 139884
b: refs/heads/master
c: fe68e68
h: refs/heads/master
v: v3
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Catalin Marinas authored and Russell King committed Apr 1, 2009
1 parent 0d0cd84 commit 74f3cfb
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2 changes: 1 addition & 1 deletion [refs]
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refs/heads/master: 01a24d2b9309676ec2e7069cd19f5b1c4a1505e0
refs/heads/master: fe68e68f6a379d317a87ae24de050a65b11ea1fb
4 changes: 2 additions & 2 deletions trunk/arch/arm/mm/abort-ev6.S
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Expand Up @@ -29,10 +29,10 @@ ENTRY(v6_early_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
/*
* Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
* Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).
* The test below covers all the write situations, including Java bytecodes
*/
bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
bic r1, r1, #1 << 11 @ clear bit 11 of FSR
tst r3, #PSR_J_BIT @ Java?
movne pc, lr
do_thumb_abort
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