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OMAP2PLUS: DSS2: Remove hack config "CONFIG_OMAP2_DSS_USE_DSI_PLL"
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The clock sources for DISPC_FCLK and LCD1_CLK are now specified in the board file.
There is no need for the hack config "CONFIG_OMAP2_DSS_USE_DSI_PLL" anymore.
Introduce function dpi_use_dsi_pll() which checks for the clock sources to decide
whether DSI PLL is to be used or not.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored and Tomi Valkeinen committed May 11, 2011
1 parent 6cb07b2 commit 7636b3b
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Showing 3 changed files with 42 additions and 54 deletions.
8 changes: 0 additions & 8 deletions drivers/video/omap2/dss/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -90,14 +90,6 @@ config OMAP2_DSS_DSI

See http://www.mipi.org/ for DSI spesifications.

config OMAP2_DSS_USE_DSI_PLL
bool "Use DSI PLL for PCLK (EXPERIMENTAL)"
default n
depends on OMAP2_DSS_DSI
help
Use DSI PLL to generate pixel clock. Currently only for DPI output.
DSI PLL can be used to generate higher and more precise pixel clocks.

config OMAP2_DSS_FAKE_VSYNC
bool "Fake VSYNC irq from manual update displays"
default n
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81 changes: 42 additions & 39 deletions drivers/video/omap2/dss/dpi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,17 @@ static struct {
struct regulator *vdds_dsi_reg;
} dpi;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
{
if (dssdev->clocks.dispc.dispc_fclk_src ==
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
dssdev->clocks.dispc.channel.lcd_clk_src ==
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)
return true;
else
return false;
}

static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
unsigned long pck_req, unsigned long *fck, int *lck_div,
int *pck_div)
Expand Down Expand Up @@ -69,7 +79,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,

return 0;
}
#else

static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
unsigned long pck_req, unsigned long *fck, int *lck_div,
int *pck_div)
Expand All @@ -96,13 +106,12 @@ static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,

return 0;
}
#endif

static int dpi_set_mode(struct omap_dss_device *dssdev)
{
struct omap_video_timings *t = &dssdev->panel.timings;
int lck_div, pck_div;
unsigned long fck;
int lck_div = 0, pck_div = 0;
unsigned long fck = 0;
unsigned long pck;
bool is_tft;
int r = 0;
Expand All @@ -114,13 +123,12 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)

is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
&lck_div, &pck_div);
#else
r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
&lck_div, &pck_div);
#endif
if (dpi_use_dsi_pll(dssdev))
r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
&fck, &lck_div, &pck_div);
else
r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
&fck, &lck_div, &pck_div);
if (r)
goto err0;

Expand Down Expand Up @@ -179,12 +187,13 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
if (r)
goto err2;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dssdev, 0, 1);
if (r)
goto err3;
#endif
if (dpi_use_dsi_pll(dssdev)) {
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dssdev, 0, 1);
if (r)
goto err3;
}

r = dpi_set_mode(dssdev);
if (r)
goto err4;
Expand All @@ -196,11 +205,11 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
return 0;

err4:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
if (dpi_use_dsi_pll(dssdev))
dsi_pll_uninit();
err3:
dss_clk_disable(DSS_CLK_SYSCK);
#endif
if (dpi_use_dsi_pll(dssdev))
dss_clk_disable(DSS_CLK_SYSCK);
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
Expand All @@ -216,11 +225,11 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_SYSCK);
#endif
if (dpi_use_dsi_pll(dssdev)) {
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_SYSCK);
}

dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);

Expand Down Expand Up @@ -251,6 +260,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
int lck_div, pck_div;
unsigned long fck;
unsigned long pck;
struct dispc_clock_info dispc_cinfo;

if (!dispc_lcd_timings_ok(timings))
return -EINVAL;
Expand All @@ -260,10 +270,8 @@ int dpi_check_timings(struct omap_dss_device *dssdev,

is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
{
if (dpi_use_dsi_pll(dssdev)) {
struct dsi_clock_info dsi_cinfo;
struct dispc_clock_info dispc_cinfo;
r = dsi_pll_calc_clock_div_pck(is_tft,
timings->pixel_clock * 1000,
&dsi_cinfo, &dispc_cinfo);
Expand All @@ -272,24 +280,19 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
return r;

fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
lck_div = dispc_cinfo.lck_div;
pck_div = dispc_cinfo.pck_div;
}
#else
{
} else {
struct dss_clock_info dss_cinfo;
struct dispc_clock_info dispc_cinfo;
r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
&dss_cinfo, &dispc_cinfo);

if (r)
return r;

fck = dss_cinfo.fck;
lck_div = dispc_cinfo.lck_div;
pck_div = dispc_cinfo.pck_div;
}
#endif

lck_div = dispc_cinfo.lck_div;
pck_div = dispc_cinfo.pck_div;

pck = fck / lck_div / pck_div / 1000;

Expand Down
7 changes: 0 additions & 7 deletions drivers/video/omap2/dss/dsi.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1417,12 +1417,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,

DSSDBG("PLL init\n");

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
/*
* HACK: this is just a quick hack to get the USE_DSI_PLL
* option working. USE_DSI_PLL is itself a big hack, and
* should be removed.
*/
if (dsi.vdds_dsi_reg == NULL) {
struct regulator *vdds_dsi;

Expand All @@ -1435,7 +1429,6 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,

dsi.vdds_dsi_reg = vdds_dsi;
}
#endif

enable_clocks(1);
dsi_enable_pll_clock(1);
Expand Down

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