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yaml
---
r: 363547
b: refs/heads/master
c: 031d399
h: refs/heads/master
i:
  363545: 0b597cf
  363543: c252ff1
v: v3
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Joe Perches authored and Greg Kroah-Hartman committed Mar 19, 2013
1 parent 4f946b2 commit 76da3d5
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Showing 2 changed files with 69 additions and 69 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 76dffe6435efee37e57efefb264a6a3b481e77fc
refs/heads/master: 031d3996ec3d33d100f272cd4dd0311a95e347e2
136 changes: 68 additions & 68 deletions trunk/drivers/staging/vt6655/upc.h
Original file line number Diff line number Diff line change
Expand Up @@ -41,32 +41,32 @@

#ifdef IO_MAP

#define VNSvInPortB(dwIOAddress, pbyData) { \
*(pbyData) = inb(dwIOAddress); \
}
#define VNSvInPortB(dwIOAddress, pbyData) { \
*(pbyData) = inb(dwIOAddress); \
}


#define VNSvInPortW(dwIOAddress, pwData) { \
*(pwData) = inw(dwIOAddress); \
}
#define VNSvInPortW(dwIOAddress, pwData) { \
*(pwData) = inw(dwIOAddress); \
}

#define VNSvInPortD(dwIOAddress, pdwData) { \
*(pdwData) = inl(dwIOAddress); \
}
#define VNSvInPortD(dwIOAddress, pdwData) { \
*(pdwData) = inl(dwIOAddress); \
}


#define VNSvOutPortB(dwIOAddress, byData) { \
outb(byData, dwIOAddress); \
}
#define VNSvOutPortB(dwIOAddress, byData) { \
outb(byData, dwIOAddress); \
}


#define VNSvOutPortW(dwIOAddress, wData) { \
outw(wData, dwIOAddress); \
}
#define VNSvOutPortW(dwIOAddress, wData) { \
outw(wData, dwIOAddress); \
}

#define VNSvOutPortD(dwIOAddress, dwData) { \
outl(dwData, dwIOAddress); \
}
#define VNSvOutPortD(dwIOAddress, dwData) { \
outl(dwData, dwIOAddress); \
}

#else

Expand All @@ -75,38 +75,38 @@
//


#define VNSvInPortB(dwIOAddress, pbyData) { \
volatile unsigned char * pbyAddr = ((unsigned char *)(dwIOAddress)); \
*(pbyData) = readb(pbyAddr); \
}
#define VNSvInPortB(dwIOAddress, pbyData) { \
volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \
*(pbyData) = readb(pbyAddr); \
}


#define VNSvInPortW(dwIOAddress, pwData) { \
volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
*(pwData) = readw(pwAddr); \
}
#define VNSvInPortW(dwIOAddress, pwData) { \
volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
*(pwData) = readw(pwAddr); \
}

#define VNSvInPortD(dwIOAddress, pdwData) { \
volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
*(pdwData) = readl(pdwAddr); \
}
#define VNSvInPortD(dwIOAddress, pdwData) { \
volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
*(pdwData) = readl(pdwAddr); \
}


#define VNSvOutPortB(dwIOAddress, byData) { \
volatile unsigned char * pbyAddr = ((unsigned char *)(dwIOAddress)); \
writeb((unsigned char)byData, pbyAddr); \
}
#define VNSvOutPortB(dwIOAddress, byData) { \
volatile unsigned char *pbyAddr = ((unsigned char *)(dwIOAddress)); \
writeb((unsigned char)byData, pbyAddr); \
}


#define VNSvOutPortW(dwIOAddress, wData) { \
volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
writew((unsigned short)wData, pwAddr); \
}
#define VNSvOutPortW(dwIOAddress, wData) { \
volatile unsigned short *pwAddr = ((unsigned short *)(dwIOAddress)); \
writew((unsigned short)wData, pwAddr); \
}

#define VNSvOutPortD(dwIOAddress, dwData) { \
volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
writel((unsigned long)dwData, pdwAddr); \
}
#define VNSvOutPortD(dwIOAddress, dwData) { \
volatile unsigned long *pdwAddr = ((unsigned long *)(dwIOAddress)); \
writel((unsigned long)dwData, pdwAddr); \
}

#endif

Expand All @@ -115,42 +115,42 @@
// ALWAYS IO-Mapped IO when in 16-bit/32-bit environment
//
#define PCBvInPortB(dwIOAddress, pbyData) { \
*(pbyData) = inb(dwIOAddress); \
}
*(pbyData) = inb(dwIOAddress); \
}

#define PCBvInPortW(dwIOAddress, pwData) { \
*(pwData) = inw(dwIOAddress); \
}
*(pwData) = inw(dwIOAddress); \
}

#define PCBvInPortD(dwIOAddress, pdwData) { \
*(pdwData) = inl(dwIOAddress); \
}
*(pdwData) = inl(dwIOAddress); \
}

#define PCBvOutPortB(dwIOAddress, byData) { \
outb(byData, dwIOAddress); \
}
outb(byData, dwIOAddress); \
}

#define PCBvOutPortW(dwIOAddress, wData) { \
outw(wData, dwIOAddress); \
}
outw(wData, dwIOAddress); \
}

#define PCBvOutPortD(dwIOAddress, dwData) { \
outl(dwData, dwIOAddress); \
}


#define PCAvDelayByIO(uDelayUnit) { \
unsigned char byData; \
unsigned long ii; \
\
if (uDelayUnit <= 50) { \
udelay(uDelayUnit); \
} \
else { \
for (ii = 0; ii < (uDelayUnit); ii++) \
byData = inb(0x61); \
} \
}
outl(dwData, dwIOAddress); \
}


#define PCAvDelayByIO(uDelayUnit) { \
unsigned char byData; \
unsigned long ii; \
\
if (uDelayUnit <= 50) { \
udelay(uDelayUnit); \
} \
else { \
for (ii = 0; ii < (uDelayUnit); ii++) \
byData = inb(0x61); \
} \
}


/*--------------------- Export Classes ----------------------------*/
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