---

yaml
---
r: 347408
b: refs/heads/master
c: 8e6b4dd
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1ffab3d4139533eff6e27b7568825307e575faa6
+refs/heads/master: 8e6b4dd1e1fbe81e7f9756eb8299632de641b2e1

trunk/Documentation/hwmon/it87

@@ -209,13 +209,3 @@ doesn't use CPU cycles.
 Trip points must be set properly before switching to automatic fan speed
 control mode. The driver will perform basic integrity checks before
 actually switching to automatic control mode.
-
-
-Temperature offset attributes
------------------------------
-
-The driver supports temp[1-3]_offset sysfs attributes to adjust the reported
-temperature for thermal diodes or diode-connected thermal transistors.
-If a temperature sensor is configured for thermistors, the attribute values
-are ignored. If the thermal sensor type is Intel PECI, the temperature offset
-must be programmed to the critical CPU temperature.

trunk/arch/arm/boot/dts/Makefile

@@ -107,7 +107,6 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
 	omap3-evm.dtb \
 	omap3-tobi.dtb \
 	omap4-panda.dtb \
-	omap4-panda-a4.dtb \
 	omap4-panda-es.dtb \
 	omap4-var-som.dtb \
 	omap4-sdp.dtb \
@@ -132,8 +131,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
 	spear320-evb.dtb \
 	spear320-hmi.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
-	sun5i-a13-olinuxino.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun4i-cubieboard.dtb \
+	sun5i-olinuxino.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \

trunk/arch/arm/boot/dts/imx27-3ds.dts

@@ -21,17 +21,17 @@
 	};
 
 	soc {
-		aipi@10000000 { /* aipi1 */
+		aipi@10000000 { /* aipi */
+
 			uart1: serial@1000a000 {
 				fsl,uart-has-rtscts;
 				status = "okay";
 			};
-		};
 
-		aipi@10020000 { /* aipi2 */
-			ethernet@1002b000 {
+			fec@1002b000 {
 				status = "okay";
 			};
 		};
 	};
+
 };

trunk/arch/arm/boot/dts/imx27-phytec-phycore.dts

@@ -21,7 +21,8 @@
 	};
 
 	soc {
-		aipi@10000000 { /* aipi1 */
+		aipi@10000000 { /* aipi */
+
 			serial@1000a000 {
 				fsl,uart-has-rtscts;
 				status = "okay";
@@ -37,6 +38,10 @@
 				status = "okay";
 			};
 
+			ethernet@1002b000 {
+				status = "okay";
+			};
+
 			i2c@1001d000 {
 				clock-frequency = <400000>;
 				status = "okay";
@@ -55,12 +60,6 @@
 				};
 			};
 		};
-
-		aipi@10020000 { /* aipi2 */
-			ethernet@1002b000 {
-				status = "okay";
-			};
-		};
 	};
 
 	nor_flash@c0000000 {

trunk/arch/arm/boot/dts/imx27.dtsi

@@ -55,7 +55,7 @@
 			compatible = "fsl,aipi-bus", "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			reg = <0x10000000 0x20000>;
+			reg = <0x10000000 0x10000000>;
 			ranges;
 
 			wdog: wdog@10002000 {
@@ -211,15 +211,6 @@
 				status = "disabled";
 			};
 
-		};
-
-		aipi@10020000 { /* AIPI2 */
-			compatible = "fsl,aipi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x10020000 0x20000>;
-			ranges;
-
 			fec: ethernet@1002b000 {
 				compatible = "fsl,imx27-fec";
 				reg = <0x1002b000 0x4000>;

trunk/arch/arm/boot/dts/omap2420-h4.dts

@@ -15,6 +15,6 @@
 
 	memory {
 		device_type = "memory";
-		reg = <0x80000000 0x4000000>; /* 64 MB */
+		reg = <0x80000000 0x84000000>; /* 64 MB */
 	};
 };

trunk/arch/arm/boot/dts/sun4i-cubieboard.dts

@@ -11,11 +11,11 @@
  */
 
 /dts-v1/;
-/include/ "sun4i-a10.dtsi"
+/include/ "sun4i.dtsi"
 
 / {
 	model = "Cubietech Cubieboard";
-	compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10";
+	compatible = "cubietech,cubieboard", "allwinner,sun4i";
 
 	aliases {
 		serial0 = &uart0;

trunk/arch/arm/boot/dts/sun5i-olinuxino.dts

@@ -12,11 +12,11 @@
  */
 
 /dts-v1/;
-/include/ "sun5i-a13.dtsi"
+/include/ "sun5i.dtsi"
 
 / {
 	model = "Olimex A13-Olinuxino";
-	compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13";
+	compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
 
 	chosen {
 		bootargs = "earlyprintk console=ttyS0,115200";

trunk/arch/arm/mach-davinci/board-da850-evm.c

@@ -41,7 +41,6 @@
 #include <mach/cp_intc.h>
 #include <mach/da8xx.h>
 #include <mach/mux.h>
-#include <mach/sram.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

trunk/arch/arm/mach-ep93xx/include/mach/uncompress.h

@@ -47,9 +47,13 @@ static void __raw_writel(unsigned int value, unsigned int ptr)
 
 static inline void putc(int c)
 {
-	/* Transmit fifo not full?  */
-	while (__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)
-		;
+	int i;
+
+	for (i = 0; i < 1000; i++) {
+		/* Transmit fifo not full?  */
+		if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
+			break;
+	}
 
 	__raw_writeb(c, PHYS_UART_DATA);
 }

trunk/arch/arm/mach-exynos/common.h

@@ -25,7 +25,7 @@ void exynos_init_late(void);
 #ifdef CONFIG_PM_GENERIC_DOMAINS
 int exynos_pm_late_initcall(void);
 #else
-static inline int exynos_pm_late_initcall(void) { return 0; }
+static int exynos_pm_late_initcall(void) { return 0; }
 #endif
 
 #ifdef CONFIG_ARCH_EXYNOS4

trunk/arch/arm/mach-imx/clk-imx51-imx53.c

@@ -319,7 +319,6 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 			unsigned long rate_ckih1, unsigned long rate_ckih2)
 {
 	int i;
-	u32 val;
 	struct device_node *np;
 
 	clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX51_DPLL1_BASE);
@@ -391,21 +390,6 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 	imx_print_silicon_rev("i.MX51", mx51_revision());
 	clk_disable_unprepare(clk[iim_gate]);
 
-	/*
-	 * Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no
-	 * longer supported. Set to one for better power saving.
-	 *
-	 * The effect of not setting these bits is that MIPI clocks can't be
-	 * enabled without the IPU clock being enabled aswell.
-	 */
-	val = readl(MXC_CCM_CCDR);
-	val |= 1 << 18;
-	writel(val, MXC_CCM_CCDR);
-
-	val = readl(MXC_CCM_CLPCR);
-	val |= 1 << 23;
-	writel(val, MXC_CCM_CLPCR);
-
 	return 0;
 }
 

trunk/arch/arm/mach-omap2/Kconfig

@@ -26,8 +26,6 @@ config SOC_HAS_OMAP2_SDRC
 
 config SOC_HAS_REALTIME_COUNTER
 	bool "Real time free running counter"
-	depends on SOC_OMAP5
-	default y
 
 config ARCH_OMAP2
 	bool "TI OMAP2"
@@ -81,6 +79,7 @@ config SOC_OMAP5
 	select ARM_GIC
 	select CPU_V7
 	select HAVE_SMP
+	select SOC_HAS_REALTIME_COUNTER
 	select COMMON_CLK
 
 comment "OMAP Core Type"

trunk/arch/arm/mach-omap2/board-3430sdp.c

@@ -157,7 +157,6 @@ static struct omap_dss_device sdp3430_lcd_device = {
 
 static struct tfp410_platform_data dvi_panel = {
 	.power_down_gpio	= -1,
-	.i2c_bus_num		= -1,
 };
 
 static struct omap_dss_device sdp3430_dvi_device = {

trunk/arch/arm/mach-omap2/board-am3517evm.c

@@ -208,7 +208,6 @@ static struct omap_dss_device am3517_evm_tv_device = {
 
 static struct tfp410_platform_data dvi_panel = {
 	.power_down_gpio	= -1,
-	.i2c_bus_num		= -1,
 };
 
 static struct omap_dss_device am3517_evm_dvi_device = {

trunk/arch/arm/mach-omap2/board-cm-t35.c

@@ -241,7 +241,6 @@ static struct omap_dss_device cm_t35_lcd_device = {
 
 static struct tfp410_platform_data dvi_panel = {
 	.power_down_gpio	= CM_T35_DVI_EN_GPIO,
-	.i2c_bus_num		= -1,
 };
 
 static struct omap_dss_device cm_t35_dvi_device = {

trunk/arch/arm/mach-omap2/board-devkit8000.c

@@ -141,7 +141,6 @@ static struct omap_dss_device devkit8000_lcd_device = {
 
 static struct tfp410_platform_data dvi_panel = {
 	.power_down_gpio	= -1,
-	.i2c_bus_num		= 1,
 };
 
 static struct omap_dss_device devkit8000_dvi_device = {

trunk/arch/arm/mach-omap2/board-h4.c

@@ -27,22 +27,26 @@
 #include <linux/io.h>
 #include <linux/input/matrix_keypad.h>
 #include <linux/mfd/menelaus.h>
-#include <linux/omap-dma.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/omap-dma.h>
+#include <plat/debug-devices.h>
+
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 
 #include "common.h"
 #include "mux.h"
 #include "control.h"
 #include "gpmc.h"
-#include "gpmc-smc91x.h"
 
 #define H4_FLASH_CS	0
+#define H4_SMC91X_CS	1
+
+#define H4_ETHR_GPIO_IRQ		92
 
 #if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
 static const uint32_t board_matrix_keys[] = {
@@ -246,30 +250,70 @@ static u32 is_gpmc_muxed(void)
 		return 0;
 }
 
-#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE)
+static inline void __init h4_init_debug(void)
+{
+	int eth_cs;
+	unsigned long cs_mem_base;
+	unsigned int muxed, rate;
+	struct clk *gpmc_fck;
+
+	eth_cs	= H4_SMC91X_CS;
 
-static struct omap_smc91x_platform_data board_smc91x_data = {
-	.cs		= 1,
-	.gpio_irq	= 92,
-	.flags		= GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_LOWLEVEL,
-};
+	gpmc_fck = clk_get(NULL, "gpmc_fck");	/* Always on ENABLE_ON_INIT */
+	if (IS_ERR(gpmc_fck)) {
+		WARN_ON(1);
+		return;
+	}
+
+	clk_prepare_enable(gpmc_fck);
+	rate = clk_get_rate(gpmc_fck);
+	clk_disable_unprepare(gpmc_fck);
+	clk_put(gpmc_fck);
 
-static void __init board_smc91x_init(void)
-{
 	if (is_gpmc_muxed())
-		board_smc91x_data.flags |= GPMC_MUX_ADD_DATA;
+		muxed = 0x200;
+	else
+		muxed = 0;
+
+	/* Make sure CS1 timings are correct */
+	gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
+			  0x00011000 | muxed);
+
+	if (rate >= 160000000) {
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
+	} else if (rate >= 130000000) {
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
+	} else {/* rate = 100000000 */
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
+		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
+	}
 
-	omap_mux_init_gpio(board_smc91x_data.gpio_irq, OMAP_PIN_INPUT);
-	gpmc_smc91x_init(&board_smc91x_data);
-}
+	if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
+		printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
+		goto out;
+	}
 
-#else
+	udelay(100);
 
-static inline void board_smc91x_init(void)
-{
-}
+	omap_mux_init_gpio(92, 0);
+	if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0)
+		gpmc_cs_free(eth_cs);
 
-#endif
+out:
+	clk_disable_unprepare(gpmc_fck);
+	clk_put(gpmc_fck);
+}
 
 static void __init h4_init_flash(void)
 {
@@ -327,7 +371,6 @@ static void __init omap_h4_init(void)
 	omap_serial_init();
 	omap_sdrc_init(NULL, NULL);
 	h4_init_flash();
-	board_smc91x_init();
 
 	omap_display_init(&h4_dss_data);
 }

trunk/arch/arm/mach-omap2/board-omap3evm.c

@@ -240,7 +240,6 @@ static struct omap_dss_device omap3_evm_tv_device = {
 
 static struct tfp410_platform_data dvi_panel = {
 	.power_down_gpio	= OMAP3EVM_DVI_PANEL_EN_GPIO,
-	.i2c_bus_num		= -1,
 };
 
 static struct omap_dss_device omap3_evm_dvi_device = {