---

yaml
---
r: 25264
b: refs/heads/master
c: 38223da
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e860f00047108ec97ac58c0d1bf59ae23e35f81c
+refs/heads/master: 38223daa1aa98d0a6f35ba7addcfefc756a04f5e

trunk/sound/pci/cs4281.c

@@ -1416,7 +1416,7 @@ static int __devinit snd_cs4281_create(struct snd_card *card,
 static int snd_cs4281_chip_init(struct cs4281 *chip)
 {
 	unsigned int tmp;
-	int timeout;
+	unsigned long end_time;
 	int retry_count = 2;
 
 	/* Having EPPMC.FPDN=1 prevent proper chip initialisation */
@@ -1496,16 +1496,16 @@ static int snd_cs4281_chip_init(struct cs4281 *chip)
 	/*
 	 * Wait for the DLL ready signal from the clock logic.
 	 */
-	timeout = 100;
+	end_time = jiffies + HZ;
 	do {
 		/*
 		 *  Read the AC97 status register to see if we've seen a CODEC
 		 *  signal from the AC97 codec.
 		 */
 		if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY)
 			goto __ok0;
-		msleep(1);
-	} while (timeout-- > 0);
+		schedule_timeout_uninterruptible(1);
+	} while (time_after_eq(end_time, jiffies));
 
 	snd_printk(KERN_ERR "DLLRDY not seen\n");
 	return -EIO;
@@ -1522,28 +1522,28 @@ static int snd_cs4281_chip_init(struct cs4281 *chip)
 	/*
 	 * Wait for the codec ready signal from the AC97 codec.
 	 */
-	timeout = 100;
+	end_time = jiffies + HZ;
 	do {
 		/*
 		 *  Read the AC97 status register to see if we've seen a CODEC
 		 *  signal from the AC97 codec.
 		 */
 		if (snd_cs4281_peekBA0(chip, BA0_ACSTS) & BA0_ACSTS_CRDY)
 			goto __ok1;
-		msleep(1);
-	} while (timeout-- > 0);
+		schedule_timeout_uninterruptible(1);
+	} while (time_after_eq(end_time, jiffies));
 
 	snd_printk(KERN_ERR "never read codec ready from AC'97 (0x%x)\n", snd_cs4281_peekBA0(chip, BA0_ACSTS));
 	return -EIO;
 
       __ok1:
 	if (chip->dual_codec) {
-		timeout = 100;
+		end_time = jiffies + HZ;
 		do {
 			if (snd_cs4281_peekBA0(chip, BA0_ACSTS2) & BA0_ACSTS_CRDY)
 				goto __codec2_ok;
-			msleep(1);
-		} while (timeout-- > 0);
+			schedule_timeout_uninterruptible(1);
+		} while (time_after_eq(end_time, jiffies));
 		snd_printk(KERN_INFO "secondary codec doesn't respond. disable it...\n");
 		chip->dual_codec = 0;
 	__codec2_ok: ;
@@ -1561,16 +1561,16 @@ static int snd_cs4281_chip_init(struct cs4281 *chip)
 	 *  the codec is pumping ADC data across the AC-link.
 	 */
 
-	timeout = 100;
+	end_time = jiffies + HZ;
 	do {
 		/*
 		 *  Read the input slot valid register and see if input slots 3
 		 *  4 are valid yet.
 		 */
                 if ((snd_cs4281_peekBA0(chip, BA0_ACISV) & (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4))) == (BA0_ACISV_SLV(3) | BA0_ACISV_SLV(4)))
                         goto __ok2;
-		msleep(1);
-	} while (timeout-- > 0);
+		schedule_timeout_uninterruptible(1);
+	} while (time_after_eq(end_time, jiffies));
 
 	if (--retry_count > 0)
 		goto __retry;