---

yaml
---
r: 282467
b: refs/heads/master
c: aa0c45f
h: refs/heads/master
i:
  282465: 9cda55b
  282463: 9fd3191
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1b223c9ebf11e9597820fac57b211709f8ffce26
+refs/heads/master: aa0c45fdca0cff3d1ba06578a84c9bc7f29a0960

trunk/drivers/gpu/drm/gma500/mid_bios.c

@@ -142,6 +142,12 @@ static void mid_get_vbt_data(struct drm_psb_private *dev_priv)
 	memcpy(vbt, vbt_virtual, sizeof(*vbt));
 	iounmap(vbt_virtual); /* Free virtual address space */
 
+	/* No matching signature don't process the data */
+	if (memcmp(vbt->signature, "$GCT", 4)) {
+		vbt->size = 0;
+		return;
+	}
+
 	dev_dbg(dev->dev, "GCT revision is %x\n", vbt->revision);
 
 	switch (vbt->revision) {

trunk/drivers/gpu/drm/gma500/oaktrail_device.c

@@ -29,6 +29,7 @@
 #include <asm/mrst.h>
 #include <asm/intel_scu_ipc.h>
 #include "mid_bios.h"
+#include "intel_bios.h"
 
 static int oaktrail_output_init(struct drm_device *dev)
 {
@@ -456,9 +457,24 @@ static int oaktrail_power_up(struct drm_device *dev)
 }
 
 
+static void oaktrail_chip_setup(struct drm_device *dev)
+{
+	int ret = mid_chip_setup(dev);
+	if (ret < 0)
+		return ret;
+	if (vbt->size == 0) {
+		/* Now pull the BIOS data */
+		gma_intel_opregion_init(dev);
+		psb_intel_init_bios(dev);
+	}
+	return 0;
+}
+
 static void oaktrail_teardown(struct drm_device *dev)
 {
 	oaktrail_hdmi_teardown(dev);
+	if (vbt->size == 0)
+		psb_intel_destroy_bios(dev);
 }
 
 const struct psb_ops oaktrail_chip_ops = {
@@ -468,7 +484,7 @@ const struct psb_ops oaktrail_chip_ops = {
 	.crtcs = 2,
 	.sgx_offset = MRST_SGX_OFFSET,
 
-	.chip_setup = mid_chip_setup,
+	.chip_setup = oaktrail_chip_setup,
 	.chip_teardown = oaktrail_teardown,
 	.crtc_helper = &oaktrail_helper_funcs,
 	.crtc_funcs = &psb_intel_crtc_funcs,