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ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()
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32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000.
Use 64-bit math to prevent this.

Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren committed Sep 11, 2012
1 parent fa67ccb commit 7a74a44
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/arm/mach-tegra/tegra20_clocks.c
Original file line number Diff line number Diff line change
Expand Up @@ -789,7 +789,7 @@ static long tegra20_pll_clk_round_rate(struct clk_hw *hw, unsigned long rate,
struct clk_tegra *c = to_clk_tegra(hw);
const struct clk_pll_freq_table *sel;
unsigned long input_rate = *prate;
unsigned long output_rate = *prate;
u64 output_rate = *prate;
int mul;
int div;

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