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yaml --- r: 100790 b: refs/heads/master c: 78673bc h: refs/heads/master v: v3
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Eduardo Valentin
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Tony Lindgren
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Jul 3, 2008
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/* | ||
* linux/arch/arm/mach-omap2/mcbsp.c | ||
* | ||
* Copyright (C) 2008 Instituto Nokia de Tecnologia | ||
* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
* | ||
* Multichannel mode not supported. | ||
*/ | ||
#include <linux/module.h> | ||
#include <linux/init.h> | ||
#include <linux/clk.h> | ||
#include <linux/err.h> | ||
#include <linux/io.h> | ||
#include <linux/platform_device.h> | ||
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#include <asm/arch/dma.h> | ||
#include <asm/arch/mux.h> | ||
#include <asm/arch/cpu.h> | ||
#include <asm/arch/mcbsp.h> | ||
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struct mcbsp_internal_clk { | ||
struct clk clk; | ||
struct clk **childs; | ||
int n_childs; | ||
}; | ||
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#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | ||
{ | ||
const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; | ||
int i; | ||
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mclk->n_childs = ARRAY_SIZE(clk_names); | ||
mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), | ||
GFP_KERNEL); | ||
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for (i = 0; i < mclk->n_childs; i++) { | ||
/* We fake a platform device to get correct device id */ | ||
struct platform_device pdev; | ||
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pdev.dev.bus = &platform_bus_type; | ||
pdev.id = mclk->clk.id; | ||
mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); | ||
if (IS_ERR(mclk->childs[i])) | ||
printk(KERN_ERR "Could not get clock %s (%d).\n", | ||
clk_names[i], mclk->clk.id); | ||
} | ||
} | ||
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static int omap_mcbsp_clk_enable(struct clk *clk) | ||
{ | ||
struct mcbsp_internal_clk *mclk = container_of(clk, | ||
struct mcbsp_internal_clk, clk); | ||
int i; | ||
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for (i = 0; i < mclk->n_childs; i++) | ||
clk_enable(mclk->childs[i]); | ||
return 0; | ||
} | ||
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static void omap_mcbsp_clk_disable(struct clk *clk) | ||
{ | ||
struct mcbsp_internal_clk *mclk = container_of(clk, | ||
struct mcbsp_internal_clk, clk); | ||
int i; | ||
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for (i = 0; i < mclk->n_childs; i++) | ||
clk_disable(mclk->childs[i]); | ||
} | ||
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static struct mcbsp_internal_clk omap_mcbsp_clks[] = { | ||
{ | ||
.clk = { | ||
.name = "mcbsp_clk", | ||
.id = 1, | ||
.enable = omap_mcbsp_clk_enable, | ||
.disable = omap_mcbsp_clk_disable, | ||
}, | ||
}, | ||
{ | ||
.clk = { | ||
.name = "mcbsp_clk", | ||
.id = 2, | ||
.enable = omap_mcbsp_clk_enable, | ||
.disable = omap_mcbsp_clk_disable, | ||
}, | ||
}, | ||
}; | ||
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#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) | ||
#else | ||
#define omap_mcbsp_clks_size 0 | ||
static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; | ||
static inline void omap_mcbsp_clk_init(struct clk *clk) | ||
{ } | ||
#endif | ||
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static void omap2_mcbsp2_mux_setup(void) | ||
{ | ||
omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); | ||
omap_cfg_reg(R14_24XX_MCBSP2_FSX); | ||
omap_cfg_reg(W15_24XX_MCBSP2_DR); | ||
omap_cfg_reg(V15_24XX_MCBSP2_DX); | ||
omap_cfg_reg(V14_24XX_GPIO117); | ||
/* | ||
* TODO: Need to add MUX settings for OMAP 2430 SDP | ||
*/ | ||
} | ||
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static void omap2_mcbsp_request(unsigned int id) | ||
{ | ||
if (cpu_is_omap2420() && (id == OMAP_MCBSP2)) | ||
omap2_mcbsp2_mux_setup(); | ||
} | ||
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static int omap2_mcbsp_check(unsigned int id) | ||
{ | ||
if (id > OMAP_MAX_MCBSP_COUNT - 1) { | ||
printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); | ||
return -ENODEV; | ||
} | ||
return 0; | ||
} | ||
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static struct omap_mcbsp_ops omap2_mcbsp_ops = { | ||
.request = omap2_mcbsp_request, | ||
.check = omap2_mcbsp_check, | ||
}; | ||
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#ifdef CONFIG_ARCH_OMAP24XX | ||
static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { | ||
{ | ||
.virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), | ||
.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | ||
.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | ||
.rx_irq = INT_24XX_MCBSP1_IRQ_RX, | ||
.tx_irq = INT_24XX_MCBSP1_IRQ_TX, | ||
.ops = &omap2_mcbsp_ops, | ||
.clk_name = "mcbsp_clk", | ||
}, | ||
{ | ||
.virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), | ||
.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | ||
.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | ||
.rx_irq = INT_24XX_MCBSP2_IRQ_RX, | ||
.tx_irq = INT_24XX_MCBSP2_IRQ_TX, | ||
.ops = &omap2_mcbsp_ops, | ||
.clk_name = "mcbsp_clk", | ||
}, | ||
}; | ||
#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) | ||
#else | ||
#define omap24xx_mcbsp_pdata NULL | ||
#define OMAP24XX_MCBSP_PDATA_SZ 0 | ||
#endif | ||
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#ifdef CONFIG_ARCH_OMAP34XX | ||
static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | ||
{ | ||
.virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), | ||
.dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | ||
.dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | ||
.rx_irq = INT_24XX_MCBSP1_IRQ_RX, | ||
.tx_irq = INT_24XX_MCBSP1_IRQ_TX, | ||
.ops = &omap2_mcbsp_ops, | ||
.clk_name = "mcbsp_clk", | ||
}, | ||
{ | ||
.virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), | ||
.dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | ||
.dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | ||
.rx_irq = INT_24XX_MCBSP2_IRQ_RX, | ||
.tx_irq = INT_24XX_MCBSP2_IRQ_TX, | ||
.ops = &omap2_mcbsp_ops, | ||
.clk_name = "mcbsp_clk", | ||
}, | ||
}; | ||
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) | ||
#else | ||
#define omap34xx_mcbsp_pdata NULL | ||
#define OMAP34XX_MCBSP_PDATA_SZ 0 | ||
#endif | ||
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int __init omap2_mcbsp_init(void) | ||
{ | ||
int i; | ||
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for (i = 0; i < omap_mcbsp_clks_size; i++) { | ||
/* Once we call clk_get inside init, we do not register it */ | ||
omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); | ||
clk_register(&omap_mcbsp_clks[i].clk); | ||
} | ||
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if (cpu_is_omap24xx()) | ||
omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, | ||
OMAP24XX_MCBSP_PDATA_SZ); | ||
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if (cpu_is_omap34xx()) | ||
omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, | ||
OMAP34XX_MCBSP_PDATA_SZ); | ||
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return omap_mcbsp_init(); | ||
} | ||
arch_initcall(omap2_mcbsp_init); |