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[ARM] S3C: Move common GPIO code from plat-s3c24xx
Move the common parts of the GPIO code into plat-s3c for use with both the s3c24xx and s3c64xx systems. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks
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Dec 15, 2008
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@@ -15,6 +15,7 @@ obj-y += init.o | |
obj-y += time.o | ||
obj-y += clock.o | ||
obj-y += pwm-clock.o | ||
obj-y += gpio.o | ||
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# devices | ||
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/* linux/arch/arm/plat-s3c/gpio.c | ||
* | ||
* Copyright 2008 Simtec Electronics | ||
* Ben Dooks <ben@simtec.co.uk> | ||
* http://armlinux.simtec.co.uk/ | ||
* | ||
* S3C series GPIO core | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/init.h> | ||
#include <linux/io.h> | ||
#include <linux/gpio.h> | ||
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#include <plat/gpio-core.h> | ||
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/* Default routines for controlling GPIO, based on the original S3C24XX | ||
* GPIO functions which deal with the case where each gpio bank of the | ||
* chip is as following: | ||
* | ||
* base + 0x00: Control register, 2 bits per gpio | ||
* gpio n: 2 bits starting at (2*n) | ||
* 00 = input, 01 = output, others mean special-function | ||
* base + 0x04: Data register, 1 bit per gpio | ||
* bit n: data bit n | ||
*/ | ||
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static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset) | ||
{ | ||
struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
void __iomem *base = ourchip->base; | ||
unsigned long flags; | ||
unsigned long con; | ||
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local_irq_save(flags); | ||
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con = __raw_readl(base + 0x00); | ||
con &= ~(3 << (offset * 2)); | ||
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__raw_writel(con, base + 0x00); | ||
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local_irq_restore(flags); | ||
return 0; | ||
} | ||
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static int s3c_gpiolib_output(struct gpio_chip *chip, | ||
unsigned offset, int value) | ||
{ | ||
struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
void __iomem *base = ourchip->base; | ||
unsigned long flags; | ||
unsigned long dat; | ||
unsigned long con; | ||
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local_irq_save(flags); | ||
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dat = __raw_readl(base + 0x04); | ||
dat &= ~(1 << offset); | ||
if (value) | ||
dat |= 1 << offset; | ||
__raw_writel(dat, base + 0x04); | ||
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con = __raw_readl(base + 0x00); | ||
con &= ~(3 << (offset * 2)); | ||
con |= 1 << (offset * 2); | ||
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__raw_writel(con, base + 0x00); | ||
__raw_writel(dat, base + 0x04); | ||
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local_irq_restore(flags); | ||
return 0; | ||
} | ||
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static void s3c_gpiolib_set(struct gpio_chip *chip, | ||
unsigned offset, int value) | ||
{ | ||
struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
void __iomem *base = ourchip->base; | ||
unsigned long flags; | ||
unsigned long dat; | ||
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local_irq_save(flags); | ||
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dat = __raw_readl(base + 0x04); | ||
dat &= ~(1 << offset); | ||
if (value) | ||
dat |= 1 << offset; | ||
__raw_writel(dat, base + 0x04); | ||
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local_irq_restore(flags); | ||
} | ||
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static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) | ||
{ | ||
struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
unsigned long val; | ||
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val = __raw_readl(ourchip->base + 0x04); | ||
val >>= offset; | ||
val &= 1; | ||
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return val; | ||
} | ||
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__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) | ||
{ | ||
struct gpio_chip *gc = &chip->chip; | ||
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BUG_ON(!chip->base); | ||
BUG_ON(!gc->label); | ||
BUG_ON(!gc->ngpio); | ||
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if (!gc->direction_input) | ||
gc->direction_input = s3c_gpiolib_input; | ||
if (!gc->direction_output) | ||
gc->direction_output = s3c_gpiolib_output; | ||
if (!gc->set) | ||
gc->set = s3c_gpiolib_set; | ||
if (!gc->get) | ||
gc->get = s3c_gpiolib_get; | ||
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/* gpiochip_add() prints own failure message on error. */ | ||
gpiochip_add(gc); | ||
} |
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@@ -0,0 +1,49 @@ | ||
/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h | ||
* | ||
* Copyright 2008 Simtec Electronics | ||
* http://armlinux.simtec.co.uk/ | ||
* Ben Dooks <ben@simtec.co.uk> | ||
* | ||
* S3C Platform - GPIO core | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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/* Define the core gpiolib support functions that the s3c platforms may | ||
* need to extend or change depending on the hardware and the s3c chip | ||
* selected at build or found at run time. | ||
* | ||
* These definitions are not intended for driver inclusion, there is | ||
* nothing here that should not live outside the platform and core | ||
* specific code. | ||
*/ | ||
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/** | ||
* struct s3c_gpio_chip - wrapper for specific implementation of gpio | ||
* @chip: The chip structure to be exported via gpiolib. | ||
* @base: The base pointer to the gpio configuration registers. | ||
* | ||
* This wrapper provides the necessary information for the Samsung | ||
* specific gpios being registered with gpiolib. | ||
*/ | ||
struct s3c_gpio_chip { | ||
struct gpio_chip chip; | ||
void __iomem *base; | ||
}; | ||
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static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) | ||
{ | ||
return container_of(gpc, struct s3c_gpio_chip, chip); | ||
} | ||
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/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip. | ||
* @chip: The chip to register | ||
* | ||
* This is a wrapper to gpiochip_add() that takes our specific gpio chip | ||
* information and makes the necessary alterations for the platform and | ||
* notes the information for use with the configuration systems and any | ||
* other parts of the system. | ||
*/ | ||
extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); |
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