Skip to content

Commit

Permalink
Merge branch 'pci/misc' into next
Browse files Browse the repository at this point in the history
* pci/misc:
  PCI/ACPI: Notify PCI devices when their power resource is turned on
  PCI: Add GPL license for drivers/pci/ioapic module
  PCI: Fix bit definitions of PCI_EXP_LNKCAP2 register
  • Loading branch information
Bjorn Helgaas committed Nov 13, 2012
2 parents f9c15b4 + 71fbad6 commit 7db78a9
Show file tree
Hide file tree
Showing 3 changed files with 7 additions and 3 deletions.
2 changes: 2 additions & 0 deletions drivers/acpi/pci_bind.c
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@ static int acpi_pci_unbind(struct acpi_device *device)

device_set_run_wake(&dev->dev, false);
pci_acpi_remove_pm_notifier(device);
acpi_power_resource_unregister_device(&dev->dev, device->handle);

if (!dev->subordinate)
goto out;
Expand All @@ -71,6 +72,7 @@ static int acpi_pci_bind(struct acpi_device *device)
return 0;

pci_acpi_add_pm_notifier(device, dev);
acpi_power_resource_register_device(&dev->dev, device->handle);
if (device->wakeup.flags.run_wake)
device_set_run_wake(&dev->dev, true);

Expand Down
2 changes: 2 additions & 0 deletions drivers/pci/ioapic.c
Original file line number Diff line number Diff line change
Expand Up @@ -125,3 +125,5 @@ static void __exit ioapic_exit(void)

module_init(ioapic_init);
module_exit(ioapic_exit);

MODULE_LICENSE("GPL");
6 changes: 3 additions & 3 deletions include/uapi/linux/pci_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -544,9 +544,9 @@
#define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */
#define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */
#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */
Expand Down

0 comments on commit 7db78a9

Please sign in to comment.