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sata_vsc: use default cache line size if non-zero
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This modifies drivers/ata/sata_vsc.c to only set the cache line size
to 0x80 if the default value is zero. Apparently zero isn't allowed
due to a bug in the chip, but I've found performance is much better
with the (non-zero) default instead of 0x80.

[note1: "default" means BIOS-programmed value, in this context -jgarzik]

[note2: superfluous braces were removed from the patch -jg]

Signed-off-by: Nate Dailey <nate.dailey@stratus.com>
Signed-off-by: Jeremy Higdon <jeremy@sgi.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Nate Dailey authored and Jeff Garzik committed Feb 15, 2007
1 parent 5278b50 commit 7de970e
Showing 1 changed file with 6 additions and 2 deletions.
8 changes: 6 additions & 2 deletions drivers/ata/sata_vsc.c
Original file line number Diff line number Diff line change
Expand Up @@ -346,6 +346,7 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
struct ata_probe_ent *probe_ent;
void __iomem *mmio_base;
int rc;
u8 cls;

if (!printed_version++)
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
Expand Down Expand Up @@ -383,9 +384,12 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
INIT_LIST_HEAD(&probe_ent->node);

/*
* Due to a bug in the chip, the default cache line size can't be used
* Due to a bug in the chip, the default cache line size can't be
* used (unless the default is non-zero).
*/
pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x80);
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cls);
if (cls == 0x00)
pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x80);

if (pci_enable_msi(pdev) == 0)
pci_intx(pdev, 0);
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