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yaml
---
r: 318453
b: refs/heads/master
c: aeb2774
h: refs/heads/master
i:
  318451: 28a010e
v: v3
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Benoît Thébaudeau authored and Linus Walleij committed Jul 17, 2012
1 parent cbd5875 commit 7e19527
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Showing 9 changed files with 105 additions and 63 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 41920d16360ebc8c482911078a17d9994fb77612
refs/heads/master: aeb27748e3bc1e89ec590713e574cb6f885cc3c6
2 changes: 1 addition & 1 deletion trunk/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
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Expand Up @@ -14,7 +14,7 @@ Required properties:
Example:

gpio0: gpio@73f84000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
reg = <0x73f84000 0x4000>;
interrupts = <50 51>;
gpio-controller;
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8 changes: 4 additions & 4 deletions trunk/arch/arm/boot/dts/imx51.dtsi
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Expand Up @@ -127,7 +127,7 @@
};

gpio1: gpio@73f84000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
reg = <0x73f84000 0x4000>;
interrupts = <50 51>;
gpio-controller;
Expand All @@ -137,7 +137,7 @@
};

gpio2: gpio@73f88000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
reg = <0x73f88000 0x4000>;
interrupts = <52 53>;
gpio-controller;
Expand All @@ -147,7 +147,7 @@
};

gpio3: gpio@73f8c000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
reg = <0x73f8c000 0x4000>;
interrupts = <54 55>;
gpio-controller;
Expand All @@ -157,7 +157,7 @@
};

gpio4: gpio@73f90000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
reg = <0x73f90000 0x4000>;
interrupts = <56 57>;
gpio-controller;
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14 changes: 7 additions & 7 deletions trunk/arch/arm/boot/dts/imx53.dtsi
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Expand Up @@ -129,7 +129,7 @@
};

gpio1: gpio@53f84000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53f84000 0x4000>;
interrupts = <50 51>;
gpio-controller;
Expand All @@ -139,7 +139,7 @@
};

gpio2: gpio@53f88000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53f88000 0x4000>;
interrupts = <52 53>;
gpio-controller;
Expand All @@ -149,7 +149,7 @@
};

gpio3: gpio@53f8c000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53f8c000 0x4000>;
interrupts = <54 55>;
gpio-controller;
Expand All @@ -159,7 +159,7 @@
};

gpio4: gpio@53f90000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53f90000 0x4000>;
interrupts = <56 57>;
gpio-controller;
Expand Down Expand Up @@ -197,7 +197,7 @@
};

gpio5: gpio@53fdc000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53fdc000 0x4000>;
interrupts = <103 104>;
gpio-controller;
Expand All @@ -207,7 +207,7 @@
};

gpio6: gpio@53fe0000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53fe0000 0x4000>;
interrupts = <105 106>;
gpio-controller;
Expand All @@ -217,7 +217,7 @@
};

gpio7: gpio@53fe4000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
reg = <0x53fe4000 0x4000>;
interrupts = <107 108>;
gpio-controller;
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14 changes: 7 additions & 7 deletions trunk/arch/arm/boot/dts/imx6q.dtsi
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Expand Up @@ -260,7 +260,7 @@
};

gpio1: gpio@0209c000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x0209c000 0x4000>;
interrupts = <0 66 0x04 0 67 0x04>;
gpio-controller;
Expand All @@ -270,7 +270,7 @@
};

gpio2: gpio@020a0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a0000 0x4000>;
interrupts = <0 68 0x04 0 69 0x04>;
gpio-controller;
Expand All @@ -280,7 +280,7 @@
};

gpio3: gpio@020a4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a4000 0x4000>;
interrupts = <0 70 0x04 0 71 0x04>;
gpio-controller;
Expand All @@ -290,7 +290,7 @@
};

gpio4: gpio@020a8000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020a8000 0x4000>;
interrupts = <0 72 0x04 0 73 0x04>;
gpio-controller;
Expand All @@ -300,7 +300,7 @@
};

gpio5: gpio@020ac000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020ac000 0x4000>;
interrupts = <0 74 0x04 0 75 0x04>;
gpio-controller;
Expand All @@ -310,7 +310,7 @@
};

gpio6: gpio@020b0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020b0000 0x4000>;
interrupts = <0 76 0x04 0 77 0x04>;
gpio-controller;
Expand All @@ -320,7 +320,7 @@
};

gpio7: gpio@020b4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
reg = <0x020b4000 0x4000>;
interrupts = <0 78 0x04 0 79 0x04>;
gpio-controller;
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10 changes: 5 additions & 5 deletions trunk/arch/arm/mach-imx/mm-imx25.c
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Expand Up @@ -90,11 +90,11 @@ static const struct resource imx25_audmux_res[] __initconst = {

void __init imx25_soc_init(void)
{
/* i.mx25 has the i.mx31 type gpio */
mxc_register_gpio("imx31-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
/* i.mx25 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
mxc_register_gpio("imx35-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
mxc_register_gpio("imx35-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);

pinctrl_provide_dummies();
/* i.mx25 has the i.mx35 type sdma */
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7 changes: 3 additions & 4 deletions trunk/arch/arm/mach-imx/mm-imx3.c
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Original file line number Diff line number Diff line change
Expand Up @@ -273,10 +273,9 @@ void __init imx35_soc_init(void)

imx3_init_l2x0();

/* i.mx35 has the i.mx31 type gpio */
mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);

pinctrl_provide_dummies();
if (to_version == 1) {
Expand Down
40 changes: 20 additions & 20 deletions trunk/arch/arm/mach-imx/mm-imx5.c
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Original file line number Diff line number Diff line change
Expand Up @@ -181,13 +181,13 @@ static const struct resource imx53_audmux_res[] __initconst = {

void __init imx50_soc_init(void)
{
/* i.mx50 has the i.mx31 type gpio */
mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
/* i.mx50 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
mxc_register_gpio("imx35-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
mxc_register_gpio("imx35-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
mxc_register_gpio("imx35-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
mxc_register_gpio("imx35-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);

/* i.mx50 has the i.mx31 type audmux */
platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
Expand All @@ -196,11 +196,11 @@ void __init imx50_soc_init(void)

void __init imx51_soc_init(void)
{
/* i.mx51 has the i.mx31 type gpio */
mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
/* i.mx51 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
mxc_register_gpio("imx35-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
mxc_register_gpio("imx35-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);

pinctrl_provide_dummies();

Expand All @@ -218,14 +218,14 @@ void __init imx51_soc_init(void)

void __init imx53_soc_init(void)
{
/* i.mx53 has the i.mx31 type gpio */
mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
/* i.mx53 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
mxc_register_gpio("imx35-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
mxc_register_gpio("imx35-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
mxc_register_gpio("imx35-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
mxc_register_gpio("imx35-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
mxc_register_gpio("imx35-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);

pinctrl_provide_dummies();
/* i.mx53 has the i.mx35 type sdma */
Expand Down
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