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ARM: dts: cfa10049: Change the SPI3 bus to spi-gpio
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The DAC found on the last chip select requires a word length of 12 bits,
which is not supported by the SSP controller of the iMX28. Use
bitbanging for that bus to support such a length.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Maxime Ripard authored and Shawn Guo committed Jan 29, 2013
1 parent e0f7d90 commit 7ecc70a
Showing 1 changed file with 42 additions and 36 deletions.
78 changes: 42 additions & 36 deletions arch/arm/boot/dts/imx28-cfa10049.dts
Original file line number Diff line number Diff line change
Expand Up @@ -52,48 +52,17 @@
spi3_pins_cfa10049: spi3-cfa10049@0 {
reg = <0>;
fsl,pinmux-ids = <
0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */
0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */
0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */
0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */
0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */
0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */
0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */
>;
fsl,drive-strength = <1>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
};

ssp3: ssp@80016000 {
compatible = "fsl,imx28-spi";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins_cfa10049>;
status = "okay";

gpio5: gpio5@0 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <2>;
spi-max-frequency = <100000>;
};

gpio6: gpio6@1 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <1>;
registers-number = <4>;
spi-max-frequency = <100000>;
};

dac0: dh2228@2 {
compatible = "rohm,dh2228fv";
reg = <2>;
spi-max-frequency = <100000>;
};
};
};

apbx@80040000 {
Expand Down Expand Up @@ -177,4 +146,41 @@
status = "okay";
};
};

spi3 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins_cfa10049>;
status = "okay";
gpio-sck = <&gpio0 24 0>;
gpio-mosi = <&gpio0 28 0>;
cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>;
num-chipselects = <3>;
#address-cells = <1>;
#size-cells = <0>;

gpio5: gpio5@0 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <2>;
spi-max-frequency = <100000>;
};

gpio6: gpio6@1 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <1>;
registers-number = <4>;
spi-max-frequency = <100000>;
};

dac0: dh2228@2 {
compatible = "rohm,dh2228fv";
reg = <2>;
spi-max-frequency = <100000>;
};
};
};

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