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yaml
---
r: 340903
b: refs/heads/master
c: 037fd9b
h: refs/heads/master
i:
  340901: f2bcc7d
  340899: 7b0eba0
  340895: a97d30e
v: v3
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Sven Eckelmann authored and John W. Linville committed Oct 19, 2012
1 parent d65c5ef commit 7f5b457
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Showing 2 changed files with 11 additions and 11 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: ed9f0ed3b977f480a35ea3d3e9d966d89724185e
refs/heads/master: 037fd9b6473393c35a31f0c43e26eb7e874e901d
20 changes: 10 additions & 10 deletions trunk/drivers/net/wireless/ath/hw.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,8 @@
#include "ath.h"
#include "reg.h"

#define REG_READ (common->ops->read)
#define REG_WRITE (common->ops->write)
#define REG_READ (common->ops->read)
#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)

/**
* ath_hw_set_bssid_mask - filter out bssids we listen
Expand Down Expand Up @@ -119,8 +119,8 @@ void ath_hw_setbssidmask(struct ath_common *common)
{
void *ah = common->ah;

REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
}
EXPORT_SYMBOL(ath_hw_setbssidmask);

Expand All @@ -139,7 +139,7 @@ void ath_hw_cycle_counters_update(struct ath_common *common)
void *ah = common->ah;

/* freeze */
REG_WRITE(ah, AR_MIBC_FMC, AR_MIBC);
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);

/* read */
cycles = REG_READ(ah, AR_CCCNT);
Expand All @@ -148,13 +148,13 @@ void ath_hw_cycle_counters_update(struct ath_common *common)
tx = REG_READ(ah, AR_TFCNT);

/* clear */
REG_WRITE(ah, 0, AR_CCCNT);
REG_WRITE(ah, 0, AR_RFCNT);
REG_WRITE(ah, 0, AR_RCCNT);
REG_WRITE(ah, 0, AR_TFCNT);
REG_WRITE(ah, AR_CCCNT, 0);
REG_WRITE(ah, AR_RFCNT, 0);
REG_WRITE(ah, AR_RCCNT, 0);
REG_WRITE(ah, AR_TFCNT, 0);

/* unfreeze */
REG_WRITE(ah, 0, AR_MIBC);
REG_WRITE(ah, AR_MIBC, 0);

/* update all cycle counters here */
common->cc_ani.cycles += cycles;
Expand Down

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