[ARM] Orion: distinguish between physical and virtual addresses

Hack up the Orion port to distinguish between virtual and physical
addresses of register windows.  This will allow moving virtual
mappings higher up in the address space, to free up more kernel
virtual address space.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>

arch/arm/mach-orion/addr-map.c

@@ -265,15 +265,15 @@ void __init orion_setup_cpu_wins(void)
 	}
 
 	/*
-	 * Setup windows for PCI+PCIE IO+MAM space
+	 * Setup windows for PCI+PCIe IO+MEM space.
 	 */
-	orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_BASE,
-				ORION_PCIE_IO_SIZE, ORION_PCIE_IO_REMAP);
-	orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_BASE,
-				ORION_PCI_IO_SIZE, ORION_PCI_IO_REMAP);
-	orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_BASE,
+	orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_PHYS_BASE,
+				ORION_PCIE_IO_SIZE, ORION_PCIE_IO_BUS_BASE);
+	orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_PHYS_BASE,
+				ORION_PCI_IO_SIZE, ORION_PCI_IO_BUS_BASE);
+	orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_PHYS_BASE,
 				ORION_PCIE_MEM_SIZE, -1);
-	orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_BASE,
+	orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_PHYS_BASE,
 				ORION_PCI_MEM_SIZE, -1);
 }
 

arch/arm/mach-orion/common.c

@@ -27,26 +27,26 @@
  ****************************************************************************/
 static struct map_desc orion_io_desc[] __initdata = {
 	{
-		.virtual	= ORION_REGS_BASE,
-		.pfn		= __phys_to_pfn(ORION_REGS_BASE),
+		.virtual	= ORION_REGS_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION_REGS_PHYS_BASE),
 		.length		= ORION_REGS_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCIE_IO_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCIE_IO_BASE),
+		.virtual	= ORION_PCIE_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
 		.length		= ORION_PCIE_IO_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCI_IO_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCI_IO_BASE),
+		.virtual	= ORION_PCI_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
 		.length		= ORION_PCI_IO_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= ORION_PCIE_WA_BASE,
-		.pfn		= __phys_to_pfn(ORION_PCIE_WA_BASE),
+		.virtual	= ORION_PCIE_WA_VIRT_BASE,
+		.pfn		= __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
 		.length		= ORION_PCIE_WA_SIZE,
 		.type		= MT_DEVICE
 	},
@@ -63,8 +63,8 @@ void __init orion_map_io(void)
 
 static struct resource orion_uart_resources[] = {
 	{
-		.start		= UART0_BASE,
-		.end		= UART0_BASE + 0xff,
+		.start		= UART0_PHYS_BASE,
+		.end		= UART0_PHYS_BASE + 0xff,
 		.flags		= IORESOURCE_MEM,
 	},
 	{
@@ -73,8 +73,8 @@ static struct resource orion_uart_resources[] = {
 		.flags		= IORESOURCE_IRQ,
 	},
 	{
-		.start		= UART1_BASE,
-		.end		= UART1_BASE + 0xff,
+		.start		= UART1_PHYS_BASE,
+		.end		= UART1_PHYS_BASE + 0xff,
 		.flags		= IORESOURCE_MEM,
 	},
 	{
@@ -86,17 +86,17 @@ static struct resource orion_uart_resources[] = {
 
 static struct plat_serial8250_port orion_uart_data[] = {
 	{
-		.mapbase	= UART0_BASE,
-		.membase	= (char *)UART0_BASE,
+		.mapbase	= UART0_PHYS_BASE,
+		.membase	= (char *)UART0_VIRT_BASE,
 		.irq		= IRQ_ORION_UART0,
 		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 		.iotype		= UPIO_MEM,
 		.regshift	= 2,
 		.uartclk	= ORION_TCLK,
 	},
 	{
-		.mapbase	= UART1_BASE,
-		.membase	= (char *)UART1_BASE,
+		.mapbase	= UART1_PHYS_BASE,
+		.membase	= (char *)UART1_VIRT_BASE,
 		.irq		= IRQ_ORION_UART1,
 		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 		.iotype		= UPIO_MEM,
@@ -122,8 +122,8 @@ static struct platform_device orion_uart = {
 
 static struct resource orion_ehci0_resources[] = {
 	{
-		.start	= ORION_USB0_REG_BASE,
-		.end	= ORION_USB0_REG_BASE + SZ_4K,
+		.start	= ORION_USB0_PHYS_BASE,
+		.end	= ORION_USB0_PHYS_BASE + SZ_4K,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
@@ -135,8 +135,8 @@ static struct resource orion_ehci0_resources[] = {
 
 static struct resource orion_ehci1_resources[] = {
 	{
-		.start	= ORION_USB1_REG_BASE,
-		.end	= ORION_USB1_REG_BASE + SZ_4K,
+		.start	= ORION_USB1_PHYS_BASE,
+		.end	= ORION_USB1_PHYS_BASE + SZ_4K,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
@@ -177,8 +177,8 @@ static struct platform_device orion_ehci1 = {
 
 static struct resource orion_eth_shared_resources[] = {
 	{
-		.start	= ORION_ETH_REG_BASE,
-		.end	= ORION_ETH_REG_BASE + 0xffff,
+		.start	= ORION_ETH_PHYS_BASE,
+		.end	= ORION_ETH_PHYS_BASE + 0xffff,
 		.flags	= IORESOURCE_MEM,
 	},
 };
@@ -227,8 +227,8 @@ static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
 static struct resource orion_i2c_resources[] = {
 	{
 		.name   = "i2c base",
-		.start  = I2C_BASE,
-		.end    = I2C_BASE + 0x20 -1,
+		.start  = I2C_PHYS_BASE,
+		.end    = I2C_PHYS_BASE + 0x20 -1,
 		.flags  = IORESOURCE_MEM,
 	},
 	{
@@ -255,8 +255,8 @@ static struct platform_device orion_i2c = {
 static struct resource orion_sata_resources[] = {
         {
                 .name   = "sata base",
-                .start  = ORION_SATA_REG_BASE,
-                .end    = ORION_SATA_REG_BASE + 0x5000 - 1,
+                .start  = ORION_SATA_PHYS_BASE,
+                .end    = ORION_SATA_PHYS_BASE + 0x5000 - 1,
                 .flags  = IORESOURCE_MEM,
         },
 	{

arch/arm/mach-orion/db88f5281-setup.c

@@ -354,8 +354,8 @@ static void __init db88f5281_init(void)
 
 MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
 	/* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */
-	.phys_io	= ORION_REGS_BASE,
-	.io_pg_offst	= ((ORION_REGS_BASE) >> 18) & 0xfffc,
+	.phys_io	= ORION_REGS_PHYS_BASE,
+	.io_pg_offst	= ((ORION_REGS_VIRT_BASE) >> 18) & 0xfffc,
 	.boot_params	= 0x00000100,
 	.init_machine	= db88f5281_init,
 	.map_io		= orion_map_io,

arch/arm/mach-orion/dns323-setup.c

@@ -259,8 +259,8 @@ static void __init dns323_init(void)
 	 *
 	 * Open a special address decode windows for the PCIE WA.
 	 */
-	orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-	orion_write(ORION_REGS_BASE | 0x20070,
+	orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+	orion_write(ORION_REGS_VIRT_BASE | 0x20070,
 		    (0x7941 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
 	/* set MPP to 0 as D-Link's 2.6.12.6 kernel did */
@@ -312,8 +312,8 @@ static void __init dns323_init(void)
 /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
 MACHINE_START(DNS323, "D-Link DNS-323")
 	/* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
-	.phys_io	= ORION_REGS_BASE,
-	.io_pg_offst	= ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+	.phys_io	= ORION_REGS_PHYS_BASE,
+	.io_pg_offst	= ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 	.boot_params	= 0x00000100,
 	.init_machine	= dns323_init,
 	.map_io		= orion_map_io,

arch/arm/mach-orion/kurobox_pro-setup.c

@@ -192,8 +192,8 @@ static void __init kurobox_pro_init(void)
 	/*
 	 * Open a special address decode windows for the PCIE WA.
 	 */
-	orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-	orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+	orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+	orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
 		(((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
 	/*
@@ -224,8 +224,8 @@ static void __init kurobox_pro_init(void)
 
 MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
 	/* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
-	.phys_io	= ORION_REGS_BASE,
-	.io_pg_offst	= ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+	.phys_io	= ORION_REGS_PHYS_BASE,
+	.io_pg_offst	= ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 	.boot_params	= 0x00000100,
 	.init_machine	= kurobox_pro_init,
 	.map_io		= orion_map_io,

arch/arm/mach-orion/pci.c

@@ -156,7 +156,7 @@ static int orion_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
 	orion_pcie_id(&dev, &rev);
 	if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) {
 		/* extended register space */
-		pcie_addr = ORION_PCIE_WA_BASE;
+		pcie_addr = ORION_PCIE_WA_VIRT_BASE;
 		pcie_addr |= PCIE_CONF_BUS(bus->number) |
 			PCIE_CONF_DEV(PCI_SLOT(devfn)) |
 			PCIE_CONF_FUNC(PCI_FUNC(devfn)) |
@@ -241,7 +241,7 @@ static int orion_pcie_setup(struct pci_sys_data *sys)
 	 */
 	res[0].name = "PCI-EX I/O Space";
 	res[0].flags = IORESOURCE_IO;
-	res[0].start = ORION_PCIE_IO_REMAP;
+	res[0].start = ORION_PCIE_IO_BUS_BASE;
 	res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1;
 	if (request_resource(&ioport_resource, &res[0]))
 		panic("Request PCIE IO resource failed\n");
@@ -252,7 +252,7 @@ static int orion_pcie_setup(struct pci_sys_data *sys)
 	 */
 	res[1].name = "PCI-EX Memory Space";
 	res[1].flags = IORESOURCE_MEM;
-	res[1].start = ORION_PCIE_MEM_BASE;
+	res[1].start = ORION_PCIE_MEM_PHYS_BASE;
 	res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1;
 	if (request_resource(&iomem_resource, &res[1]))
 		panic("Request PCIE Memory resource failed\n");
@@ -477,7 +477,7 @@ static int orion_pci_setup(struct pci_sys_data *sys)
 	 */
 	res[0].name = "PCI I/O Space";
 	res[0].flags = IORESOURCE_IO;
-	res[0].start = ORION_PCI_IO_REMAP;
+	res[0].start = ORION_PCI_IO_BUS_BASE;
 	res[0].end = res[0].start + ORION_PCI_IO_SIZE - 1;
 	if (request_resource(&ioport_resource, &res[0]))
 		panic("Request PCI IO resource failed\n");
@@ -488,7 +488,7 @@ static int orion_pci_setup(struct pci_sys_data *sys)
 	 */
 	res[1].name = "PCI Memory Space";
 	res[1].flags = IORESOURCE_MEM;
-	res[1].start = ORION_PCI_MEM_BASE;
+	res[1].start = ORION_PCI_MEM_PHYS_BASE;
 	res[1].end = res[1].start + ORION_PCI_MEM_SIZE - 1;
 	if (request_resource(&iomem_resource, &res[1]))
 		panic("Request PCI Memory resource failed\n");

arch/arm/mach-orion/rd88f5182-setup.c

@@ -263,8 +263,8 @@ static void __init rd88f5182_init(void)
 	/*
 	 * Open a special address decode windows for the PCIE WA.
 	 */
-	orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-	orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+	orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+	orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
 		(((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
 	/*
@@ -305,8 +305,8 @@ static void __init rd88f5182_init(void)
 
 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
 	/* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
-	.phys_io	= ORION_REGS_BASE,
-	.io_pg_offst	= ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+	.phys_io	= ORION_REGS_PHYS_BASE,
+	.io_pg_offst	= ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 	.boot_params	= 0x00000100,
 	.init_machine	= rd88f5182_init,
 	.map_io		= orion_map_io,

arch/arm/mach-orion/ts209-setup.c

@@ -244,7 +244,7 @@ static struct platform_device *qnap_ts209_devices[] __initdata = {
  * QNAP TS-[12]09 specific power off method via UART1-attached PIC
  */
 
-#define UART1_REG(x)  (UART1_BASE + ((UART_##x) << 2))
+#define UART1_REG(x)  (UART1_VIRT_BASE + ((UART_##x) << 2))
 
 static void qnap_ts209_power_off(void)
 {
@@ -282,8 +282,8 @@ static void __init qnap_ts209_init(void)
 	/*
 	 * Open a special address decode windows for the PCIE WA.
 	 */
-	orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
-	orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
+	orion_write(ORION_REGS_VIRT_BASE | 0x20074, ORION_PCIE_WA_PHYS_BASE);
+	orion_write(ORION_REGS_VIRT_BASE | 0x20070, (0x7941 |
 		(((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
 
 	/*
@@ -325,8 +325,8 @@ static void __init qnap_ts209_init(void)
 
 MACHINE_START(TS209, "QNAP TS-109/TS-209")
 	/* Maintainer:  Byron Bradley <byron.bbradley@gmail.com> */
-	.phys_io	= ORION_REGS_BASE,
-	.io_pg_offst	= ((ORION_REGS_BASE) >> 18) & 0xFFFC,
+	.phys_io	= ORION_REGS_PHYS_BASE,
+	.io_pg_offst	= ((ORION_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 	.boot_params	= 0x00000100,
 	.init_machine	= qnap_ts209_init,
 	.map_io		= orion_map_io,

include/asm-arm/arch-orion/debug-macro.S

@@ -8,9 +8,14 @@
  * published by the Free Software Foundation.
 */
 
+#include <asm/arch/orion.h>
+
 	.macro  addruart,rx
-	mov   \rx, #0xf1000000
-	orr   \rx, \rx, #0x00012000
+	mrc	p15, 0, \rx, c1, c0
+	tst	\rx, #1					@ MMU enabled?
+	ldreq	\rx, =ORION_REGS_PHYS_BASE
+	ldrne	\rx, =ORION_REGS_VIRT_BASE
+	orr	\rx, \rx, #0x00012000
 	.endm
 
 #define UART_SHIFT	2

include/asm-arm/arch-orion/entry-macro.S

@@ -3,8 +3,8 @@
  *
  * Low-level IRQ helper macros for Orion platforms
  *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
 

include/asm-arm/arch-orion/hardware.h

@@ -4,21 +4,18 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
- *
  */
 
 #ifndef __ASM_ARCH_HARDWARE_H__
 #define __ASM_ARCH_HARDWARE_H__
 
 #include "orion.h"
 
-#define PCI_MEMORY_VADDR        ORION_PCI_SYS_MEM_BASE
-#define PCI_IO_VADDR            ORION_PCI_SYS_IO_BASE
+#define pcibios_assign_all_busses()	1
 
-#define pcibios_assign_all_busses()  1
+#define PCIBIOS_MIN_IO		0x00001000
+#define PCIBIOS_MIN_MEM		0x01000000
+#define PCIMEM_BASE		ORION_PCIE_MEM_PHYS_BASE
 
-#define PCIBIOS_MIN_IO  0x1000
-#define PCIBIOS_MIN_MEM 0x01000000
-#define PCIMEM_BASE     PCI_MEMORY_VADDR /* mem base for VGA */
 
-#endif  /* _ASM_ARCH_HARDWARE_H */
+#endif