---

yaml
---
r: 297575
b: refs/heads/master
c: 6bebb57
h: refs/heads/master
i:
  297573: cd89a57
  297571: 2c79c3d
  297567: 4953e7d
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 60db4fcf14c6b562399579473a67e51eed694ff4
+refs/heads/master: 6bebb572404f96d367170fb263603cda7251f932

trunk/arch/arm/configs/integrator_defconfig

@@ -57,18 +57,24 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_NET_PCI=y
 CONFIG_E100=y
+CONFIG_SMC91X=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIAL_AMBA_PL010=y
 CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
 CONFIG_FB=y
 CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_ARMCLCD=y
 CONFIG_FB_MATROX=y
 CONFIG_FB_MATROX_MILLENIUM=y
 CONFIG_FB_MATROX_MYSTIQUE=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PL030=y
 CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
@@ -78,5 +84,7 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y

trunk/arch/arm/mm/copypage-v4mc.c

@@ -23,6 +23,10 @@
 
 #include "mm.h"
 
+/*
+ * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
+ * specific hacks for copying pages efficiently.
+ */
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
 				  L_PTE_MT_MINICACHE)
 
@@ -74,9 +78,10 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
 
 	raw_spin_lock(&minicache_lock);
 
-	set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
+	set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
+	flush_tlb_kernel_page(0xffff8000);
 
-	mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
+	mc_copy_user_page((void *)0xffff8000, kto);
 
 	raw_spin_unlock(&minicache_lock);
 

trunk/arch/arm/mm/copypage-v6.c

@@ -24,6 +24,9 @@
 #error FIX ME
 #endif
 
+#define from_address	(0xffff8000)
+#define to_address	(0xffffc000)
+
 static DEFINE_RAW_SPINLOCK(v6_lock);
 
 /*
@@ -87,11 +90,14 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
 	 */
 	raw_spin_lock(&v6_lock);
 
-	kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT);
-	kto   = COPYPAGE_V6_TO + (offset << PAGE_SHIFT);
+	set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
+	set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
+
+	kfrom = from_address + (offset << PAGE_SHIFT);
+	kto   = to_address + (offset << PAGE_SHIFT);
 
-	set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL));
-	set_top_pte(kto, mk_pte(to, PAGE_KERNEL));
+	flush_tlb_kernel_page(kfrom);
+	flush_tlb_kernel_page(kto);
 
 	copy_page((void *)kto, (void *)kfrom);
 
@@ -105,7 +111,8 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
  */
 static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
-	unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+	unsigned int offset = CACHE_COLOUR(vaddr);
+	unsigned long to = to_address + (offset << PAGE_SHIFT);
 
 	/* FIXME: not highmem safe */
 	discard_old_kernel_data(page_address(page));
@@ -116,7 +123,8 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
 	 */
 	raw_spin_lock(&v6_lock);
 
-	set_top_pte(to, mk_pte(page, PAGE_KERNEL));
+	set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
+	flush_tlb_kernel_page(to);
 	clear_page((void *)to);
 
 	raw_spin_unlock(&v6_lock);

trunk/arch/arm/mm/copypage-xscale.c

@@ -23,6 +23,12 @@
 
 #include "mm.h"
 
+/*
+ * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
+ * specific hacks for copying pages efficiently.
+ */
+#define COPYPAGE_MINICACHE	0xffff8000
+
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
 				  L_PTE_MT_MINICACHE)
 
@@ -94,7 +100,8 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
 
 	raw_spin_lock(&minicache_lock);
 
-	set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
+	set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
+	flush_tlb_kernel_page(COPYPAGE_MINICACHE);
 
 	mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 

trunk/arch/arm/mm/flush.c

@@ -23,12 +23,15 @@
 
 #ifdef CONFIG_CPU_CACHE_VIPT
 
+#define ALIAS_FLUSH_START	0xffff4000
+
 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 {
-	unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+	unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
 	const int zero = 0;
 
-	set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
+	set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
+	flush_tlb_kernel_page(to);
 
 	asm(	"mcrr	p15, 0, %1, %0, c14\n"
 	"	mcr	p15, 0, %2, c7, c10, 4"
@@ -39,12 +42,13 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 
 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
 {
-	unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+	unsigned long colour = CACHE_COLOUR(vaddr);
 	unsigned long offset = vaddr & (PAGE_SIZE - 1);
 	unsigned long to;
 
-	set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
-	to = va + offset;
+	set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
+	to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset;
+	flush_tlb_kernel_page(to);
 	flush_icache_range(to, to + len);
 }
 

trunk/arch/arm/mm/highmem.c

@@ -69,14 +69,15 @@ void *__kmap_atomic(struct page *page)
 	 * With debugging enabled, kunmap_atomic forces that entry to 0.
 	 * Make sure it was indeed properly unmapped.
 	 */
-	BUG_ON(!pte_none(get_top_pte(vaddr)));
+	BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
 #endif
+	set_pte_ext(TOP_PTE(vaddr), mk_pte(page, kmap_prot), 0);
 	/*
 	 * When debugging is off, kunmap_atomic leaves the previous mapping
-	 * in place, so the contained TLB flush ensures the TLB is updated
-	 * with the new mapping.
+	 * in place, so this TLB flush ensures the TLB is updated with the
+	 * new mapping.
 	 */
-	set_top_pte(vaddr, mk_pte(page, kmap_prot));
+	local_flush_tlb_kernel_page(vaddr);
 
 	return (void *)vaddr;
 }
@@ -95,7 +96,8 @@ void __kunmap_atomic(void *kvaddr)
 			__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
 #ifdef CONFIG_DEBUG_HIGHMEM
 		BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
-		set_top_pte(vaddr, __pte(0));
+		set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
+		local_flush_tlb_kernel_page(vaddr);
 #else
 		(void) idx;  /* to kill a warning */
 #endif
@@ -119,19 +121,22 @@ void *kmap_atomic_pfn(unsigned long pfn)
 	idx = type + KM_TYPE_NR * smp_processor_id();
 	vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-	BUG_ON(!pte_none(get_top_pte(vaddr)));
+	BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
 #endif
-	set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
+	set_pte_ext(TOP_PTE(vaddr), pfn_pte(pfn, kmap_prot), 0);
+	local_flush_tlb_kernel_page(vaddr);
 
 	return (void *)vaddr;
 }
 
 struct page *kmap_atomic_to_page(const void *ptr)
 {
 	unsigned long vaddr = (unsigned long)ptr;
+	pte_t *pte;
 
 	if (vaddr < FIXADDR_START)
 		return virt_to_page(ptr);
 
-	return pte_page(get_top_pte(vaddr));
+	pte = TOP_PTE(vaddr);
+	return pte_page(*pte);
 }

trunk/arch/arm/mm/mm.h

@@ -3,31 +3,7 @@
 /* the upper-most page table pointer */
 extern pmd_t *top_pmd;
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently, while 0xffff4000
- * is reserved for VIPT aliasing flushing by generic code.
- *
- * Note that we don't allow VIPT aliasing caches with SMP.
- */
-#define COPYPAGE_MINICACHE	0xffff8000
-#define COPYPAGE_V6_FROM	0xffff8000
-#define COPYPAGE_V6_TO		0xffffc000
-/* PFN alias flushing, for VIPT caches */
-#define FLUSH_ALIAS_START	0xffff4000
-
-static inline void set_top_pte(unsigned long va, pte_t pte)
-{
-	pte_t *ptep = pte_offset_kernel(top_pmd, va);
-	set_pte_ext(ptep, pte, 0);
-	local_flush_tlb_kernel_page(va);
-}
-
-static inline pte_t get_top_pte(unsigned long va)
-{
-	pte_t *ptep = pte_offset_kernel(top_pmd, va);
-	return *ptep;
-}
+#define TOP_PTE(x)	pte_offset_kernel(top_pmd, x)
 
 static inline pmd_t *pmd_off_k(unsigned long virt)
 {