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yaml
---
r: 366147
b: refs/heads/master
c: f4e2e9a
h: refs/heads/master
i:
  366145: c701f87
  366143: 3b986dd
v: v3
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Thomas Gleixner committed Apr 8, 2013
1 parent b72d2a4 commit 81b5131
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Showing 3 changed files with 4 additions and 13 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 7d1a941731fabf27e5fb6edbebb79fe856edb4e5
refs/heads/master: f4e2e9a4b26789d963000f974f2dc80230bb4674
1 change: 1 addition & 0 deletions trunk/arch/xtensa/Kconfig
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Expand Up @@ -19,6 +19,7 @@ config XTENSA
select CLONE_BACKWARDS
select IRQ_DOMAIN
select HAVE_OPROFILE
select GENERIC_IDLE_LOOP
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both
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14 changes: 2 additions & 12 deletions trunk/arch/xtensa/kernel/process.c
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Expand Up @@ -105,19 +105,9 @@ void coprocessor_flush_all(struct thread_info *ti)
/*
* Powermanagement idle function, if any is provided by the platform.
*/

void cpu_idle(void)
void arch_cpu_idle(void)
{
local_irq_enable();

/* endless idle loop with no priority at all */
while (1) {
rcu_idle_enter();
while (!need_resched())
platform_idle();
rcu_idle_exit();
schedule_preempt_disabled();
}
platform_idle();
}

/*
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