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This patch introduces support for the tcc platform by creating an arch/arm/plat-tcc and arch/arm/mach-tcc8k directories and adding basic include files plus Kconfig and Makefile. Signed-off-by: "Hans J. Koch" <hjk@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Hans J. Koch
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Thomas Gleixner
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Sep 17, 2010
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if ARCH_TCC8K | ||
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comment "TCC8000 systems:" | ||
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endif |
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if ARCH_TCC_926 | ||
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menu "Telechips ARM926-based CPUs" | ||
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choice | ||
prompt "Telechips CPU type:" | ||
default ARCH_TCC8K | ||
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config ARCH_TCC8K | ||
bool TCC8000 | ||
select USB_ARCH_HAS_OHCI | ||
help | ||
Support for Telechips TCC8000 systems | ||
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endchoice | ||
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source "arch/arm/mach-tcc8k/Kconfig" | ||
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endmenu | ||
endif |
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# "Telechips Platform Common Modules" | ||
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obj-y := system.o |
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/* | ||
* Copyright (C) 1994-1999 Russell King | ||
* Copyright (C) 2008-2009 Telechips | ||
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
* | ||
*/ | ||
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.macro addruart,rx,tmp | ||
mrc p15, 0, \rx, c1, c0 | ||
tst \rx, #1 @ MMU enabled? | ||
moveq \rx, #0x90000000 @ physical base address | ||
movne \rx, #0xF1000000 @ virtual base | ||
orr \rx, \rx, #0x00007000 @ UART0 | ||
.endm | ||
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.macro senduart,rd,rx | ||
strb \rd, [\rx, #0x44] | ||
.endm | ||
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.macro waituart,rd,rx | ||
.endm | ||
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.macro busyuart,rd,rx | ||
1001: | ||
ldr \rd, [\rx, #0x14] | ||
tst \rd, #0x20 | ||
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beq 1001b | ||
.endm |
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/* | ||
* include/asm-arm/arch-tcc83x/entry-macro.S | ||
* | ||
* Author : <linux@telechips.com> | ||
* Created: June 10, 2008 | ||
* Description: Low-level IRQ helper macros for Telechips-based platforms | ||
* | ||
* Copyright (C) 2008-2009 Telechips | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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#include <mach/hardware.h> | ||
#include <mach/irqs.h> | ||
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.macro disable_fiq | ||
.endm | ||
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.macro get_irqnr_preamble, base, tmp | ||
.endm | ||
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.macro arch_ret_to_user, tmp1, tmp2 | ||
.endm | ||
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
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ldr \base, =0xF2003000 @ base address of PIC registers | ||
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@@ read MREQ register of PIC0 | ||
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mov \irqnr, #0 | ||
ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts | ||
cmp \irqstat, #0 | ||
bne 1001f | ||
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@@ read MREQ register of PIC1 | ||
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ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts | ||
cmp \irqstat, #0 | ||
beq 1002f | ||
mov \irqnr, #0x20 | ||
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1001: | ||
movs \tmp, \irqstat, lsl #16 | ||
movne \irqstat, \tmp | ||
addeq \irqnr, \irqnr, #16 | ||
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movs \tmp, \irqstat, lsl #8 | ||
movne \irqstat, \tmp | ||
addeq \irqnr, \irqnr, #8 | ||
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movs \tmp, \irqstat, lsl #4 | ||
movne \irqstat, \tmp | ||
addeq \irqnr, \irqnr, #4 | ||
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movs \tmp, \irqstat, lsl #2 | ||
movne \irqstat, \tmp | ||
addeq \irqnr, \irqnr, #2 | ||
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movs \tmp, \irqstat, lsl #1 | ||
addeq \irqnr, \irqnr, #1 | ||
orrs \base, \base, #1 | ||
1002: | ||
@@ exit here, Z flag unset if IRQ | ||
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.endm |
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/* | ||
* Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com> | ||
* Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com> | ||
* and Dirk Behme <dirk.behme@de.bosch.com> | ||
* Rewritten by: <linux@telechips.com> | ||
* Description: Hardware definitions for TCC8300 processors and boards | ||
* | ||
* Copyright (C) 2001 RidgeRun, Inc. | ||
* Copyright (C) 2008-2009 Telechips | ||
* | ||
* Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de> | ||
* | ||
* Licensed under the terms of the GNU Pulic License version 2. | ||
*/ | ||
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#ifndef __ASM_ARCH_TCC_HARDWARE_H | ||
#define __ASM_ARCH_TCC_HARDWARE_H | ||
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#include <asm/sizes.h> | ||
#ifndef __ASSEMBLER__ | ||
#include <asm/types.h> | ||
#endif | ||
#include <mach/io.h> | ||
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/* | ||
* ---------------------------------------------------------------------------- | ||
* Clocks | ||
* ---------------------------------------------------------------------------- | ||
*/ | ||
#define CLKGEN_REG_BASE 0xfffece00 | ||
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) | ||
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) | ||
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) | ||
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) | ||
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) | ||
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) | ||
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) | ||
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) | ||
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/* DPLL control registers */ | ||
#define DPLL_CTL 0xfffecf00 | ||
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#endif /* __ASM_ARCH_TCC_HARDWARE_H */ |
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/* | ||
* Copyright (C) 1999 ARM Limited | ||
* Copyright (C) 2000 RidgeRun, Inc. | ||
* Copyright (C) 2008-2009 Telechips | ||
* Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de> | ||
* | ||
* Licensed under the terms of the GPL v2. | ||
*/ | ||
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#ifndef __ASM_ARCH_MEMORY_H | ||
#define __ASM_ARCH_MEMORY_H | ||
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/* | ||
* Physical DRAM offset. | ||
*/ | ||
#define PHYS_OFFSET UL(0x20000000) | ||
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#endif |
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/* | ||
* Author: <linux@telechips.com> | ||
* Created: June 10, 2008 | ||
* Description: LINUX SYSTEM FUNCTIONS for TCC83x | ||
* | ||
* Copyright (C) 2008-2009 Telechips | ||
* | ||
* Licensed under the terms of the GPL v2. | ||
* | ||
*/ | ||
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#ifndef __ASM_ARCH_SYSTEM_H | ||
#define __ASM_ARCH_SYSTEM_H | ||
#include <linux/clk.h> | ||
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#include <asm/mach-types.h> | ||
#include <mach/hardware.h> | ||
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extern void plat_tcc_reboot(void); | ||
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static inline void arch_idle(void) | ||
{ | ||
cpu_do_idle(); | ||
} | ||
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static inline void arch_reset(char mode, const char *cmd) | ||
{ | ||
plat_tcc_reboot(); | ||
} | ||
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#endif |
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