Skip to content

Commit

Permalink
V4L/DVB (10955): cx231xx: CodingStyle automatic fixes with Lindent
Browse files Browse the repository at this point in the history 
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
  • Loading branch information
Mauro Carvalho Chehab committed Apr 7, 2009
1 parent e0d3baf commit 84b5dbf
Show file tree
Hide file tree
Showing 13 changed files with 5,809 additions and 4,900 deletions.
255 changes: 129 additions & 126 deletions drivers/media/video/cx231xx/cx231xx-audio.c
View file

Large diffs are not rendered by default.

4,383 changes: 2,578 additions & 1,805 deletions drivers/media/video/cx231xx/cx231xx-avcore.c
View file

Large diffs are not rendered by default.

976 changes: 514 additions & 462 deletions drivers/media/video/cx231xx/cx231xx-cards.c
View file

Large diffs are not rendered by default.

132 changes: 64 additions & 68 deletions drivers/media/video/cx231xx/cx231xx-conf-reg.h
View file

Large diffs are not rendered by default.

1,126 changes: 585 additions & 541 deletions drivers/media/video/cx231xx/cx231xx-core.c
View file

Large diffs are not rendered by default.

264 changes: 129 additions & 135 deletions drivers/media/video/cx231xx/cx231xx-dvb.c
View file

Large diffs are not rendered by default.

567 changes: 294 additions & 273 deletions drivers/media/video/cx231xx/cx231xx-i2c.c
View file

Large diffs are not rendered by default.

24 changes: 10 additions & 14 deletions drivers/media/video/cx231xx/cx231xx-input.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@
handle cx231xx IR remotes via linux kernel input layer.
Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
Based on em28xx driver
Based on em28xx driver
< This is a place holder for IR now.>
< This is a place holder for IR now.>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
Expand All @@ -30,7 +30,6 @@

#include "cx231xx.h"


static unsigned int ir_debug;
module_param(ir_debug, int, 0644);
MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]");
Expand Down Expand Up @@ -71,11 +70,9 @@ struct cx231xx_IR {
unsigned int last_readcount;
unsigned int repeat_interval;

int (*get_key)(struct cx231xx_IR *, struct cx231xx_ir_poll_result *);
int (*get_key) (struct cx231xx_IR *, struct cx231xx_ir_poll_result *);
};



/**********************************************************
Polling code for cx231xx
**********************************************************/
Expand Down Expand Up @@ -187,17 +184,16 @@ int cx231xx_ir_init(struct cx231xx *dev)

/* Setup the proper handler based on the chip */
switch (dev->chip_id) {
default:
printk("Unrecognized cx231xx chip id: IR not supported\n");
goto err_out_free;
default:
printk("Unrecognized cx231xx chip id: IR not supported\n");
goto err_out_free;
}

/* This is how often we ask the chip for IR information */
ir->polling = 100; /* ms */
ir->polling = 100; /* ms */

/* init input device */
snprintf(ir->name, sizeof(ir->name), "cx231xx IR (%s)",
dev->name);
snprintf(ir->name, sizeof(ir->name), "cx231xx IR (%s)", dev->name);

usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
strlcat(ir->phys, "/input0", sizeof(ir->phys));
Expand All @@ -223,10 +219,10 @@ int cx231xx_ir_init(struct cx231xx *dev)
goto err_out_stop;

return 0;
err_out_stop:
err_out_stop:
cx231xx_ir_stop(ir);
dev->ir = NULL;
err_out_free:
err_out_free:
input_free_device(input_dev);
kfree(ir);
return err;
Expand Down
59 changes: 24 additions & 35 deletions drivers/media/video/cx231xx/cx231xx-reg.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@
#define _CX231XX_REG_H

/*****************************************************************************
* VBI codes *
* VBI codes *
*****************************************************************************/

#define SAV_ACTIVE_VIDEO_FIELD1 0x80
Expand All @@ -37,16 +37,16 @@
#define SAV_VBLANK_FIELD2 0xE0
#define EAV_VBLANK_FIELD2 0xF0

#define SAV_VBI_FIELD1 0x20
#define EAV_VBI_FIELD1 0x30
#define SAV_VBI_FIELD1 0x20
#define EAV_VBI_FIELD1 0x30

#define SAV_VBI_FIELD2 0x60
#define EAV_VBI_FIELD2 0x70
#define SAV_VBI_FIELD2 0x60
#define EAV_VBI_FIELD2 0x70

/*****************************************************************************/
/* Audio ADC Registers */
#define CH_PWR_CTRL1 0x0000000E
#define CH_PWR_CTRL2 0x0000000F
#define CH_PWR_CTRL1 0x0000000E
#define CH_PWR_CTRL2 0x0000000F
/*****************************************************************************/

#define HOST_REG1 0x000
Expand All @@ -60,7 +60,6 @@
/*****************************************************************************/
#define HOST_REG2 0x001


/*****************************************************************************/
#define HOST_REG3 0x002

Expand Down Expand Up @@ -231,7 +230,6 @@
/* Reserved [3:1] */
#define FLD_CIR_TEST_DIS 0x00000001


/*****************************************************************************/
#define TEST_CTRL2 0x148
#define FLD_TSXCLK_POL_CTL 0x80000000
Expand All @@ -257,7 +255,6 @@
#define FLD_FLTRN_BIST_TST_DONE 0x00000008
#define FLD_VID_BIST_TST_DONE 0x00000007


/*****************************************************************************/
/* DirectIF registers definition have been moved to DIF_reg.h */
/*****************************************************************************/
Expand All @@ -268,7 +265,7 @@
#define FLD_AFD_FORCE_PAL 0x04000000
#define FLD_AFD_PALM_SEL 0x03000000
#define FLD_CKILL_MODE 0x00300000
#define FLD_COMB_NOTCH_MODE 0x00c00000 /* bit[19:18] */
#define FLD_COMB_NOTCH_MODE 0x00c00000 /* bit[19:18] */
#define FLD_CLR_LOCK_STAT 0x00020000
#define FLD_FAST_LOCK_MD 0x00010000
#define FLD_WCEN 0x00008000
Expand Down Expand Up @@ -662,7 +659,6 @@
#define FLD_PLL_KI 0x00FF0000
#define FLD_PLL_MAX_OFFSET 0x0000FFFF


/*****************************************************************************/
#define HTL_CTRL 0x498
/* Reserved [31:24] */
Expand Down Expand Up @@ -771,13 +767,12 @@
#define FLD_FIELD_PHASE_LIMIT 0x000000F0
#define FLD_HEAD_SW_DET_LIMIT 0x0000000F


/*****************************************************************************/
#define DL_CTL 0x800
#define DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */
#define DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */
#define DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */
#define DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */
#define DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */
#define DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */
#define DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */
#define DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */
/* Reserved [31:5] */
#define FLD_START_8051 0x10000000
#define FLD_DL_ENABLE 0x08000000
Expand All @@ -795,8 +790,8 @@
#define AUD_BUILD_NUM 0x806
#define AUD_VER_NUM 0x807
#define STD_DET_CTL 0x808
#define STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */
#define STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */
#define STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */
#define STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */
#define FLD_SPARE_CTL0 0xFF000000
#define FLD_DIS_DBX 0x00800000
#define FLD_DIS_BTSC 0x00400000
Expand Down Expand Up @@ -1424,7 +1419,6 @@
#define FLD_I2S_OUT_WS_SEL 0x00000020
#define FLD_I2S_OUT_BCN_DEL 0x0000001F


/*****************************************************************************/
#define AC97_CTL 0x91C
/* Reserved [31:26] */
Expand All @@ -1437,7 +1431,6 @@
/* Reserved [7:1] */
#define FLD_AC97_SHUTDOWN 0x00000001


/* Cx231xx redefine */
#define QPSK_IAGC_CTL1 0x94c
#define QPSK_IAGC_CTL2 0x950
Expand All @@ -1450,7 +1443,6 @@
#define QPSK_EQ_CTL 0x96c
#define QPSK_LOCK_CTL 0x970


/*****************************************************************************/
#define FM1_DFT_CTL 0x9A8
#define FLD_FM1_DFT_THRESHOLD 0xFFFF0000
Expand Down Expand Up @@ -1494,8 +1486,6 @@
/* Reserved [15:6] */
#define FLD_AFE_VGA_OUT 0x0000003F



/*****************************************************************************/
#define MTS_GAIN_STATUS 0x9BC
/* Reserved [31:14] */
Expand Down Expand Up @@ -1538,19 +1528,18 @@
#define VID_FMT_SECAM 12
#define VID_FMT_SECAM_60 13

#define INPUT_MODE_CVBS_0 0 /* INPUT_MODE_VALUE(0) */
#define INPUT_MODE_YC_1 1 /* INPUT_MODE_VALUE(1) */
#define INPUT_MODE_YC2_2 2 /* INPUT_MODE_VALUE(2) */
#define INPUT_MODE_YUV_3 3 /* INPUT_MODE_VALUE(3) */

#define INPUT_MODE_CVBS_0 0 /* INPUT_MODE_VALUE(0) */
#define INPUT_MODE_YC_1 1 /* INPUT_MODE_VALUE(1) */
#define INPUT_MODE_YC2_2 2 /* INPUT_MODE_VALUE(2) */
#define INPUT_MODE_YUV_3 3 /* INPUT_MODE_VALUE(3) */

#define LUMA_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
#define LUMA_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
#define LUMA_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */
#define LUMA_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
#define LUMA_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
#define LUMA_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */

#define UV_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
#define UV_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
#define UV_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */
#define UV_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
#define UV_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
#define UV_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */

#define TWO_TAP_FILT 0
#define THREE_TAP_FILT 1
Expand Down
Loading

0 comments on commit 84b5dbf

Please sign in to comment.