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yaml
---
r: 142252
b: refs/heads/master
c: 161fde0
h: refs/heads/master
v: v3
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Han, Weidong authored and David Woodhouse committed Apr 3, 2009
1 parent afe64a3 commit 85a9c3a
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Showing 3 changed files with 18 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b24696bc55f66fecc30715e003f10fc2555a9271
refs/heads/master: 161fde083f3403e7aa178dc944bf43c339e18491
15 changes: 15 additions & 0 deletions trunk/drivers/pci/intr_remapping.c
Original file line number Diff line number Diff line change
Expand Up @@ -415,12 +415,27 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)

/* Set interrupt-remapping table pointer */
cmd = iommu->gcmd | DMA_GCMD_SIRTP;
iommu->gcmd |= DMA_GCMD_SIRTP;
writel(cmd, iommu->reg + DMAR_GCMD_REG);

IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
readl, (sts & DMA_GSTS_IRTPS), sts);
spin_unlock_irqrestore(&iommu->register_lock, flags);

if (mode == 0) {
spin_lock_irqsave(&iommu->register_lock, flags);

/* enable comaptiblity format interrupt pass through */
cmd = iommu->gcmd | DMA_GCMD_CFI;
iommu->gcmd |= DMA_GCMD_CFI;
writel(cmd, iommu->reg + DMAR_GCMD_REG);

IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
readl, (sts & DMA_GSTS_CFIS), sts);

spin_unlock_irqrestore(&iommu->register_lock, flags);
}

/*
* global invalidation of interrupt entry cache before enabling
* interrupt-remapping.
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2 changes: 2 additions & 0 deletions trunk/include/linux/intel-iommu.h
Original file line number Diff line number Diff line change
Expand Up @@ -164,6 +164,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
#define DMA_GCMD_QIE (((u32)1) << 26)
#define DMA_GCMD_SIRTP (((u32)1) << 24)
#define DMA_GCMD_IRE (((u32) 1) << 25)
#define DMA_GCMD_CFI (((u32) 1) << 23)

/* GSTS_REG */
#define DMA_GSTS_TES (((u32)1) << 31)
Expand All @@ -174,6 +175,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
#define DMA_GSTS_QIES (((u32)1) << 26)
#define DMA_GSTS_IRTPS (((u32)1) << 24)
#define DMA_GSTS_IRES (((u32)1) << 25)
#define DMA_GSTS_CFIS (((u32)1) << 23)

/* CCMD_REG */
#define DMA_CCMD_ICC (((u64)1) << 63)
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