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yaml
---
r: 9456
b: refs/heads/master
c: 7d318d7
h: refs/heads/master
v: v3
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Andi Kleen authored and Linus Torvalds committed Sep 29, 2005
1 parent 6f06751 commit 86e8210
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Showing 4 changed files with 30 additions and 11 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 5acbc5cb507e6c381b70093b1081854708e82b16
refs/heads/master: 7d318d774789657c37a5e994a4a2cf59d4879ae7
16 changes: 16 additions & 0 deletions trunk/arch/i386/kernel/cpu/amd.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,22 @@ static void __init init_amd(struct cpuinfo_x86 *c)
int mbytes = num_physpages >> (20-PAGE_SHIFT);
int r;

#ifdef CONFIG_SMP
unsigned long value;

/* Disable TLB flush filter by setting HWCR.FFDIS on K8
* bit 6 of msr C001_0015
*
* Errata 63 for SH-B3 steppings
* Errata 122 for all steppings (F+ have it disabled by default)
*/
if (c->x86 == 15) {
rdmsrl(MSR_K7_HWCR, value);
value |= 1 << 6;
wrmsrl(MSR_K7_HWCR, value);
}
#endif

/*
* FIXME: We should handle the K5 here. Set up the write
* range and also turn on MSR 83 bits 4 and 31 (write alloc,
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22 changes: 12 additions & 10 deletions trunk/arch/x86_64/kernel/setup.c
Original file line number Diff line number Diff line change
Expand Up @@ -831,8 +831,6 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
#endif
}

#define HWCR 0xc0010015

static int __init init_amd(struct cpuinfo_x86 *c)
{
int r;
Expand All @@ -841,14 +839,18 @@ static int __init init_amd(struct cpuinfo_x86 *c)
#ifdef CONFIG_SMP
unsigned long value;

// Disable TLB flush filter by setting HWCR.FFDIS:
// bit 6 of msr C001_0015
//
// Errata 63 for SH-B3 steppings
// Errata 122 for all(?) steppings
rdmsrl(HWCR, value);
value |= 1 << 6;
wrmsrl(HWCR, value);
/*
* Disable TLB flush filter by setting HWCR.FFDIS on K8
* bit 6 of msr C001_0015
*
* Errata 63 for SH-B3 steppings
* Errata 122 for all steppings (F+ have it disabled by default)
*/
if (c->x86 == 15) {
rdmsrl(MSR_K8_HWCR, value);
value |= 1 << 6;
wrmsrl(MSR_K8_HWCR, value);
}
#endif

/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
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1 change: 1 addition & 0 deletions trunk/include/asm-x86_64/msr.h
Original file line number Diff line number Diff line change
Expand Up @@ -234,6 +234,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
#define MSR_K8_TOP_MEM1 0xC001001A
#define MSR_K8_TOP_MEM2 0xC001001D
#define MSR_K8_SYSCFG 0xC0010010
#define MSR_K8_HWCR 0xC0010015

/* K6 MSRs */
#define MSR_K6_EFER 0xC0000080
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