---

yaml
---
r: 314091
b: refs/heads/master
c: be42aee
h: refs/heads/master
i:
  314089: 23b47bd
  314087: 5c6cd0e
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c331b344d5def33194427b24cb2190ff345f7f55
+refs/heads/master: be42aee6df93597f669b4d20e7a32c8fc144f104

trunk/drivers/net/wireless/ti/wl18xx/main.c

@@ -580,6 +580,8 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
 		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
 			     wl->chip.id);
 		wl->sr_fw_name = WL18XX_FW_NAME;
+		/* wl18xx uses the same firmware for PLT */
+		wl->plt_fw_name = WL18XX_FW_NAME;
 		wl->quirks |= WLCORE_QUIRK_NO_ELP |
 			      WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
 			      WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN;
@@ -958,9 +960,17 @@ static void wl18xx_conf_init(struct wl1271 *wl)
 	memcpy(&priv->conf, &wl18xx_default_priv_conf, sizeof(priv->conf));
 }
 
+static int wl18xx_plt_init(struct wl1271 *wl)
+{
+	wl1271_write32(wl, WL18XX_SCR_PAD8, WL18XX_SCR_PAD8_PLT);
+
+	return wl->ops->boot(wl);
+}
+
 static struct wlcore_ops wl18xx_ops = {
 	.identify_chip	= wl18xx_identify_chip,
 	.boot		= wl18xx_boot,
+	.plt_init	= wl18xx_plt_init,
 	.trigger_cmd	= wl18xx_trigger_cmd,
 	.ack_event	= wl18xx_ack_event,
 	.calc_tx_blocks = wl18xx_calc_tx_blocks,

trunk/drivers/net/wireless/ti/wl18xx/reg.h

@@ -154,6 +154,12 @@
  */
 #define WL18XX_INTR_TRIG_EVENT_ACK BIT(29)
 
+/*
+ * To boot the firmware in PLT mode we need to write this value in
+ * SCR_PAD8 before starting.
+ */
+#define WL18XX_SCR_PAD8_PLT	0xBABABEBE
+
 /* TODO: maybe move elsewhere? */
 #define NUM_OF_CHANNELS_11_ABG 150
 #define NUM_OF_CHANNELS_11_P 7