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yaml
---
r: 137310
b: refs/heads/master
c: 0e9ae10
h: refs/heads/master
v: v3
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Russell King authored and Russell King committed Feb 8, 2009
1 parent fde0906 commit 888a443
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Showing 2 changed files with 9 additions and 10 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 1d14de087dd1cab0436fb7c9d5e38d852f33df69
refs/heads/master: 0e9ae109e4eece027ede4f3f0edc8e659f8298c9
17 changes: 8 additions & 9 deletions trunk/drivers/i2c/busses/i2c-omap.c
Original file line number Diff line number Diff line change
Expand Up @@ -312,15 +312,14 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);

if (cpu_class_is_omap1()) {
struct clk *armxor_ck;

armxor_ck = clk_get(NULL, "armxor_ck");
if (IS_ERR(armxor_ck))
dev_warn(dev->dev, "Could not get armxor_ck\n");
else {
fclk_rate = clk_get_rate(armxor_ck);
clk_put(armxor_ck);
}
/*
* The I2C functional clock is the armxor_ck, so there's
* no need to get "armxor_ck" separately. Now, if OMAP2420
* always returns 12MHz for the functional clock, we can
* do this bit unconditionally.
*/
fclk_rate = clk_get_rate(dev->fclk);

/* TRM for 5912 says the I2C clock must be prescaled to be
* between 7 - 12 MHz. The XOR input clock is typically
* 12, 13 or 19.2 MHz. So we should have code that produces:
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