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---
r: 132079
b: refs/heads/master
c: 9bd50df
h: refs/heads/master
i:
  132077: 344b9f5
  132075: f1caa48
  132071: 7ce1144
  132063: f597ce0
v: v3
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Philippe Gerum authored and Bryan Wu committed Mar 4, 2009
1 parent 38560ab commit 894a532
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Showing 11 changed files with 242 additions and 304 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 97d4b35fb44cd5a80bc10952e2b1de5d3a14117b
refs/heads/master: 9bd50df6aa9bdd583793a16b0b9379dfd78c079e
100 changes: 36 additions & 64 deletions trunk/arch/blackfin/include/asm/ipipe.h
Original file line number Diff line number Diff line change
Expand Up @@ -35,9 +35,9 @@
#include <asm/atomic.h>
#include <asm/traps.h>

#define IPIPE_ARCH_STRING "1.8-00"
#define IPIPE_ARCH_STRING "1.9-00"
#define IPIPE_MAJOR_NUMBER 1
#define IPIPE_MINOR_NUMBER 8
#define IPIPE_MINOR_NUMBER 9
#define IPIPE_PATCH_NUMBER 0

#ifdef CONFIG_SMP
Expand Down Expand Up @@ -83,9 +83,9 @@ struct ipipe_sysinfo {
"%2 = CYCLES2\n" \
"CC = %2 == %0\n" \
"if ! CC jump 1b\n" \
: "=r" (((unsigned long *)&t)[1]), \
"=r" (((unsigned long *)&t)[0]), \
"=r" (__cy2) \
: "=d,a" (((unsigned long *)&t)[1]), \
"=d,a" (((unsigned long *)&t)[0]), \
"=d,a" (__cy2) \
: /*no input*/ : "CC"); \
t; \
})
Expand Down Expand Up @@ -118,35 +118,40 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,

#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))

#define __ipipe_lock_root() \
set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)
static inline int __ipipe_check_tickdev(const char *devname)
{
return 1;
}

#define __ipipe_unlock_root() \
clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)
static inline void __ipipe_lock_root(void)
{
set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
}

static inline void __ipipe_unlock_root(void)
{
clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status));
}

void __ipipe_enable_pipeline(void);

#define __ipipe_hook_critical_ipi(ipd) do { } while (0)

#define __ipipe_sync_pipeline(syncmask) \
do { \
struct ipipe_domain *ipd = ipipe_current_domain; \
if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
__ipipe_sync_stage(syncmask); \
} while (0)
#define __ipipe_sync_pipeline ___ipipe_sync_pipeline
void ___ipipe_sync_pipeline(unsigned long syncmask);

void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);

int __ipipe_get_irq_priority(unsigned irq);

int __ipipe_get_irqthread_priority(unsigned irq);

void __ipipe_stall_root_raw(void);

void __ipipe_unstall_root_raw(void);

void __ipipe_serial_debug(const char *fmt, ...);

asmlinkage void __ipipe_call_irqtail(unsigned long addr);

DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);

extern unsigned long __ipipe_core_clock;
Expand All @@ -162,42 +167,25 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)

#define __ipipe_run_irqtail() /* Must be a macro */ \
do { \
asmlinkage void __ipipe_call_irqtail(void); \
unsigned long __pending; \
CSYNC(); \
CSYNC(); \
__pending = bfin_read_IPEND(); \
if (__pending & 0x8000) { \
__pending &= ~0x8010; \
if (__pending && (__pending & (__pending - 1)) == 0) \
__ipipe_call_irqtail(); \
__ipipe_call_irqtail(__ipipe_irq_tail_hook); \
} \
} while (0)

#define __ipipe_run_isr(ipd, irq) \
do { \
if (ipd == ipipe_root_domain) { \
/* \
* Note: the I-pipe implements a threaded interrupt model on \
* this arch for Linux external IRQs. The interrupt handler we \
* call here only wakes up the associated IRQ thread. \
*/ \
if (ipipe_virtual_irq_p(irq)) { \
/* No irqtail here; virtual interrupts have no effect \
on IPEND so there is no need for processing \
deferral. */ \
local_irq_enable_nohead(ipd); \
local_irq_enable_hw(); \
if (ipipe_virtual_irq_p(irq)) \
ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
local_irq_disable_nohead(ipd); \
} else \
/* \
* No need to run the irqtail here either; \
* we can't be preempted by hw IRQs, so \
* non-Linux IRQs cannot stack over the short \
* thread wakeup code. Which in turn means \
* that no irqtail condition could be pending \
* for domains above Linux in the pipeline. \
*/ \
else \
ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
local_irq_disable_hw(); \
} else { \
__clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
local_irq_enable_nohead(ipd); \
Expand All @@ -217,42 +205,24 @@ void ipipe_init_irq_threads(void);

int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);

#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS)
#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS)

#ifdef CONFIG_GENERIC_CLOCKEVENTS
#define IRQ_SYSTMR IRQ_CORETMR
#define IRQ_PRIOTMR IRQ_CORETMR
#else
#define IRQ_SYSTMR IRQ_TIMER0
#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
#endif

#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533)
#define PRIO_GPIODEMUX(irq) CONFIG_PFA
#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
#elif defined(CONFIG_BF52x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
(irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
(irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
-1)
#elif defined(CONFIG_BF561)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
(irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
(irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
-1)
#ifdef CONFIG_BF561
#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
#elif defined(CONFIG_BF54x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
(irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
(irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
(irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
-1)
#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
#else
# error "no PRIO_GPIODEMUX() for this part"
#endif

#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
Expand All @@ -275,4 +245,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);

#endif /* !CONFIG_IPIPE */

#define ipipe_update_tick_evtdev(evtdev) do { } while (0)

#endif /* !__ASM_BLACKFIN_IPIPE_H */
12 changes: 4 additions & 8 deletions trunk/arch/blackfin/include/asm/ipipe_base.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* -*- linux-c -*-
* include/asm-blackfin/_baseipipe.h
* include/asm-blackfin/ipipe_base.h
*
* Copyright (C) 2007 Philippe Gerum.
*
Expand Down Expand Up @@ -27,8 +27,9 @@
#define IPIPE_NR_XIRQS NR_IRQS
#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */

/* Blackfin-specific, global domain flags */
#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */
/* Blackfin-specific, per-cpu pipeline status */
#define IPIPE_SYNCDEFER_FLAG 15
#define IPIPE_SYNCDEFER_MASK (1L << IPIPE_SYNCDEFER_MASK)

/* Blackfin traps -- i.e. exception vector numbers */
#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
Expand All @@ -48,11 +49,6 @@

#ifndef __ASSEMBLY__

#include <linux/bitops.h>

extern int test_bit(int nr, const void *addr);


extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */

static inline void __ipipe_stall_root(void)
Expand Down
36 changes: 27 additions & 9 deletions trunk/arch/blackfin/include/asm/irq.h
Original file line number Diff line number Diff line change
Expand Up @@ -61,20 +61,38 @@ void __ipipe_restore_root(unsigned long flags);
#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)

#define local_save_flags(x) \
do { \
(x) = __ipipe_test_root() ? \
#define local_save_flags(x) \
do { \
(x) = __ipipe_test_root() ? \
__all_masked_irq_flags : bfin_irq_flags; \
barrier(); \
} while (0)

#define local_irq_save(x) \
do { \
(x) = __ipipe_test_and_stall_root(); \
#define local_irq_save(x) \
do { \
(x) = __ipipe_test_and_stall_root() ? \
__all_masked_irq_flags : bfin_irq_flags; \
barrier(); \
} while (0)

static inline void local_irq_restore(unsigned long x)
{
barrier();
__ipipe_restore_root(x == __all_masked_irq_flags);
}

#define local_irq_disable() \
do { \
__ipipe_stall_root(); \
barrier(); \
} while (0)

#define local_irq_restore(x) __ipipe_restore_root(x)
#define local_irq_disable() __ipipe_stall_root()
#define local_irq_enable() __ipipe_unstall_root()
static inline void local_irq_enable(void)
{
barrier();
__ipipe_unstall_root();
}

#define irqs_disabled() __ipipe_test_root()

#define local_save_flags_hw(x) \
Expand Down
2 changes: 2 additions & 0 deletions trunk/arch/blackfin/include/asm/thread_info.h
Original file line number Diff line number Diff line change
Expand Up @@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_MEMDIE 4
#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
#define TIF_FREEZE 6 /* is freezing for suspend */
#define TIF_IRQ_SYNC 7 /* sync pipeline stage */

/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
Expand All @@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_FREEZE (1<<TIF_FREEZE)
#define _TIF_IRQ_SYNC (1<<TIF_IRQ_SYNC)

#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */

Expand Down
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