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ASoC/ARM: Davinci: McASP: split asp header into platform and audio sp…
…ecific Davinci McASP header & driver are shared by few OMAP platforms (like TI81xx, AM335x). Splitting asp header into Davinci platform specific header and Audio specific header helps to share them across platforms. Audio specific defines is moved to to common <linux/platform_data/davinci_asp.h> so that the header can be accessed by all related platforms. While here, correct the header usage (remove multiple header re-definitions and unused headers) and remove platform names from structures comments and enum. Also some some coding style errors. Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Hebbar, Gururaja
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Mark Brown
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Aug 27, 2012
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Original file line number | Diff line number | Diff line change |
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/* | ||
* TI DaVinci Audio definitions | ||
*/ | ||
#ifndef __ASM_ARCH_DAVINCI_ASP_H | ||
#define __ASM_ARCH_DAVINCI_ASP_H | ||
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/* Bases of dm644x and dm355 register banks */ | ||
#define DAVINCI_ASP0_BASE 0x01E02000 | ||
#define DAVINCI_ASP1_BASE 0x01E04000 | ||
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/* Bases of dm365 register banks */ | ||
#define DAVINCI_DM365_ASP0_BASE 0x01D02000 | ||
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/* Bases of dm646x register banks */ | ||
#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 | ||
#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 | ||
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/* Bases of da850/da830 McASP0 register banks */ | ||
#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000 | ||
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/* Bases of da830 McASP1 register banks */ | ||
#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 | ||
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/* EDMA channels of dm644x and dm355 */ | ||
#define DAVINCI_DMA_ASP0_TX 2 | ||
#define DAVINCI_DMA_ASP0_RX 3 | ||
#define DAVINCI_DMA_ASP1_TX 8 | ||
#define DAVINCI_DMA_ASP1_RX 9 | ||
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/* EDMA channels of dm646x */ | ||
#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6 | ||
#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 | ||
#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 | ||
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/* EDMA channels of da850/da830 McASP0 */ | ||
#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0 | ||
#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1 | ||
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/* EDMA channels of da830 McASP1 */ | ||
#define DAVINCI_DA830_DMA_MCASP1_AREVT 2 | ||
#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 | ||
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/* Interrupts */ | ||
#define DAVINCI_ASP0_RX_INT IRQ_MBRINT | ||
#define DAVINCI_ASP0_TX_INT IRQ_MBXINT | ||
#define DAVINCI_ASP1_RX_INT IRQ_MBRINT | ||
#define DAVINCI_ASP1_TX_INT IRQ_MBXINT | ||
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#endif /* __ASM_ARCH_DAVINCI_ASP_H */ |
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