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yaml
---
r: 112259
b: refs/heads/master
c: b726e49
h: refs/heads/master
i:
  112257: c3b514c
  112255: 1ae6b84
v: v3
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Francois Romieu committed Oct 10, 2008
1 parent 224765b commit 8a7f00c
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Showing 2 changed files with 76 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 2e68ae44309bfadccdb5ddd68b9c38d2a1efeb94
refs/heads/master: b726e493e8dc13537d1d7f8cd66bcd28516606c3
75 changes: 75 additions & 0 deletions trunk/drivers/net/r8169.c
Original file line number Diff line number Diff line change
Expand Up @@ -2384,34 +2384,109 @@ static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len)
}
}

static void rtl_disable_clock_request(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
struct rtl8169_private *tp = netdev_priv(dev);
int cap = tp->pcie_cap;

if (cap) {
u16 ctl;

pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
}
}

#define R8168_CPCMD_QUIRK_MASK (\
EnableBist | \
Mac_dbgo_oe | \
Force_half_dup | \
Force_rxflow_en | \
Force_txflow_en | \
Cxpl_dbg_sel | \
ASF | \
PktCntrDisable | \
Mac_dbgo_sel)

static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
{
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);

rtl_tx_performance_tweak(pdev,
(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}

static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
{
rtl_hw_start_8168bb(ioaddr, pdev);

RTL_W8(EarlyTxThres, EarlyTxThld);

RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
}

static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
{
RTL_W8(Config1, RTL_R8(Config1) | Speed_down);

RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

rtl_disable_clock_request(pdev);

RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

static void rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
{
static struct ephy_info e_info_8168cp[] = {
{ 0x01, 0, 0x0001 },
{ 0x02, 0x0800, 0x1000 },
{ 0x03, 0, 0x0042 },
{ 0x06, 0x0080, 0x0000 },
{ 0x07, 0, 0x2000 }
};

rtl_csi_access_enable(ioaddr);

rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));

__rtl_hw_start_8168cp(ioaddr, pdev);
}

static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
{
static struct ephy_info e_info_8168c_1[] = {
{ 0x02, 0x0800, 0x1000 },
{ 0x03, 0, 0x0002 },
{ 0x06, 0x0080, 0x0000 }
};

rtl_csi_access_enable(ioaddr);

RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);

rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));

__rtl_hw_start_8168cp(ioaddr, pdev);
}

static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
static struct ephy_info e_info_8168c_2[] = {
{ 0x01, 0, 0x0001 },
{ 0x03, 0x0400, 0x0220 }
};

rtl_csi_access_enable(ioaddr);

rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));

__rtl_hw_start_8168cp(ioaddr, pdev);
}

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