---

yaml
---
r: 62671
b: refs/heads/master
c: cbc4dbf
h: refs/heads/master
i:
  62669: 2c01619
  62667: 80feaf1
  62663: f9fd967
  62655: ab0b4df
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: b2627588cbeb70364357048854affd52bf02fe64
+refs/heads/master: cbc4dbffc89fbaada94ae7873ad6631a701fd00e

trunk/include/asm-arm/arch-s3c2410/debug-macro.S

@@ -14,9 +14,7 @@
 
 #include <asm/arch/map.h>
 #include <asm/arch/regs-gpio.h>
-
 #include <asm/plat-s3c/regs-serial.h>
-#include <asm/plat-s3c/debug-macro.S>
 
 #define S3C2410_UART1_OFF (0x4000)
 #define SHIFT_2440TXF (14-9)
@@ -31,7 +29,7 @@
 #endif
 	.endm
 
-	.macro fifo_full rd, rx
+	.macro fifo_full_s3c24xx rd, rx
 		@ check for arm920 vs arm926. currently assume all arm926
 		@ devices have an 64 byte FIFO identical to the s3c2440
 		mrc	p15, 0, \rd, c0, c0
@@ -52,7 +50,14 @@
 		tst	\rd, #S3C2410_UFSTAT_TXFULL
 	.endm
 
-	.macro fifo_level rd, rx
+	.macro  fifo_full_s3c2410 rd, rx
+		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
+		tst	\rd, #S3C2410_UFSTAT_TXFULL
+	.endm
+
+/* fifo level reading */
+
+	.macro fifo_level_s3c24xx rd, rx
 		mrc	p15, 0, \rd, c1, c0
 		tst	\rd, #1
 		addeq	\rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
@@ -66,3 +71,27 @@
 		andne	\rd, \rd, #S3C2410_UFSTAT_TXMASK
 		andeq	\rd, \rd, #S3C2440_UFSTAT_TXMASK
 	.endm
+
+	.macro fifo_level_s3c2410 rd, rx
+		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
+		and	\rd, \rd, #S3C2410_UFSTAT_TXMASK
+	.endm
+
+/* Select the correct implementation depending on the configuration. The
+ * S3C2440 will get selected by default, as these are the most widely
+ * used variants of these
+*/
+
+#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
+#define fifo_full  fifo_full_s3c2410
+#define fifo_level fifo_level_s3c2410
+#warning 2410only
+#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
+#define fifo_full  fifo_full_s3c24xx
+#define fifo_level fifo_level_s3c24xx
+#warning generic
+#endif
+
+/* include the reset of the code which will do the work */
+
+#include <asm/plat-s3c/debug-macro.S>

trunk/include/asm-arm/plat-s3c/debug-macro.S

@@ -11,7 +11,26 @@
 
 #include <asm/plat-s3c/regs-serial.h>
 
-#define S3C2410_UART1_OFF (0x4000)
+/* The S3C2440 implementations are used by default as they are the
+ * most widely re-used */
+
+	.macro fifo_level_s3c2440 rd, rx
+		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
+		and	\rd, \rd, #S3C2440_UFSTAT_TXMASK
+	.endm
+
+#ifndef fifo_level
+#define fifo_level fifo_level_s3c2410
+#endif
+
+	.macro  fifo_full_s3c2440 rd, rx
+		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
+		tst	\rd, #S3C2440_UFSTAT_TXFULL
+	.endm
+
+#ifndef fifo_full
+#define fifo_full fifo_full_s3c2440
+#endif
 
 	.macro	senduart,rd,rx
 		strb 	\rd, [\rx, # S3C2410_UTXH ]
@@ -37,7 +56,6 @@
 	.endm
 
 	.macro	waituart,rd,rx
-
 		ldr	\rd, [ \rx, # S3C2410_UFCON ]
 		tst	\rd, #S3C2410_UFCON_FIFOMODE	@ fifo enabled?
 		beq	1001f				@