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Merge branch 'omap/dt' into next/drivers
Needed for the omap timer changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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OMAP Counter-32K bindings | ||
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Required properties: | ||
- compatible: Must be "ti,omap-counter32k" for OMAP controllers | ||
- reg: Contains timer register address range (base address and length) | ||
- ti,hwmods: Name of the hwmod associated to the counter, which is typically | ||
"counter_32k" | ||
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Example: | ||
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counter32k: counter@4a304000 { | ||
compatible = "ti,omap-counter32k"; | ||
reg = <0x4a304000 0x20>; | ||
ti,hwmods = "counter_32k"; | ||
}; |
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OMAP Timer bindings | ||
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Required properties: | ||
- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers. | ||
- reg: Contains timer register address range (base address and | ||
length). | ||
- interrupts: Contains the interrupt information for the timer. The | ||
format is being dependent on which interrupt controller | ||
the OMAP device uses. | ||
- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>", | ||
where <X> is the instance number of the timer from the | ||
HW spec. | ||
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Optional properties: | ||
- ti,timer-alwon: Indicates the timer is in an alway-on power domain. | ||
- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in | ||
addition to the ARM CPU. | ||
- ti,timer-pwm: Indicates the timer can generate a PWM output. | ||
- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device | ||
and therefore cannot be used by the kernel. | ||
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Example: | ||
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timer12: timer@48304000 { | ||
compatible = "ti,omap2-timer"; | ||
reg = <0x48304000 0x400>; | ||
interrupts = <95>; | ||
ti,hwmods = "timer12" | ||
ti,timer-alwon; | ||
ti,timer-secure; | ||
}; |
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19 changes: 19 additions & 0 deletions
19
Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt
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* EETI eGalax Multiple Touch Controller | ||
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Required properties: | ||
- compatible: must be "eeti,egalax_ts" | ||
- reg: i2c slave address | ||
- interrupt-parent: the phandle for the interrupt controller | ||
- interrupts: touch controller interrupt | ||
- wakeup-gpios: the gpio pin to be used for waking up the controller | ||
as well as uased as irq pin | ||
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Example: | ||
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egalax_ts@04 { | ||
compatible = "eeti,egalax_ts"; | ||
reg = <0x04>; | ||
interrupt-parent = <&gpio1>; | ||
interrupts = <9 2>; | ||
wakeup-gpios = <&gpio1 9 0>; | ||
}; |
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Chinese translated version of Documentation/IRQ.txt | ||
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If you have any comment or update to the content, please contact the | ||
original document maintainer directly. However, if you have a problem | ||
communicating in English you can also ask the Chinese maintainer for | ||
help. Contact the Chinese maintainer if this translation is outdated | ||
or if there is a problem with the translation. | ||
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Maintainer: Eric W. Biederman <ebiederman@xmission.com> | ||
Chinese maintainer: Fu Wei <tekkamanninja@gmail.com> | ||
--------------------------------------------------------------------- | ||
Documentation/IRQ.txt 的中文翻译 | ||
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如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文 | ||
交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻 | ||
译存在问题,请联系中文版维护者。 | ||
英文版维护者: Eric W. Biederman <ebiederman@xmission.com> | ||
中文版维护者: 傅炜 Fu Wei <tekkamanninja@gmail.com> | ||
中文版翻译者: 傅炜 Fu Wei <tekkamanninja@gmail.com> | ||
中文版校译者: 傅炜 Fu Wei <tekkamanninja@gmail.com> | ||
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以下为正文 | ||
--------------------------------------------------------------------- | ||
何为 IRQ? | ||
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一个 IRQ 是来自某个设备的一个中断请求。目前,它们可以来自一个硬件引脚, | ||
或来自一个数据包。多个设备可能连接到同个硬件引脚,从而共享一个 IRQ。 | ||
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一个 IRQ 编号是用于告知硬件中断源的内核标识。通常情况下,这是一个 | ||
全局 irq_desc 数组的索引,但是除了在 linux/interrupt.h 中的实现, | ||
具体的细节是体系结构特定的。 | ||
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一个 IRQ 编号是设备上某个可能的中断源的枚举。通常情况下,枚举的编号是 | ||
该引脚在系统内中断控制器的所有输入引脚中的编号。对于 ISA 总线中的情况, | ||
枚举的是在两个 i8259 中断控制器中 16 个输入引脚。 | ||
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架构可以对 IRQ 编号指定额外的含义,在硬件涉及任何手工配置的情况下, | ||
是被提倡的。ISA 的 IRQ 是一个分配这类额外含义的典型例子。 |
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