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USB: xhci: Represent 64-bit addresses with one u64.
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There are several xHCI data structures that use two 32-bit fields to
represent a 64-bit address.  Since some architectures don't support 64-bit
PCI writes, the fields need to be written in two 32-bit writes.  The xHCI
specification says that if a platform is incapable of generating 64-bit
writes, software must write the low 32-bits first, then the high 32-bits.
Hardware that supports 64-bit addressing will wait for the high 32-bit
write before reading the revised value, and hardware that only supports
32-bit writes will ignore the high 32-bit write.

Previous xHCI code represented 64-bit addresses with two u32 values.  This
lead to buggy code that would write the 32-bits in the wrong order, or
forget to write the upper 32-bits.  Change the two u32s to one u64 and
create a function call to write all 64-bit addresses in the proper order.
This new function could be modified in the future if all platforms support
64-bit writes.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Sarah Sharp authored and Greg Kroah-Hartman committed Jul 28, 2009
1 parent b11069f commit 8e595a5
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Showing 5 changed files with 137 additions and 148 deletions.
67 changes: 26 additions & 41 deletions drivers/usb/host/xhci-dbg.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -173,6 +173,7 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int
{
void *addr;
u32 temp;
u64 temp_64;

addr = &ir_set->irq_pending;
temp = xhci_readl(xhci, addr);
Expand Down Expand Up @@ -200,25 +201,15 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int
xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n",
addr, (unsigned int)temp);

addr = &ir_set->erst_base[0];
temp = xhci_readl(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_base[0] = 0x%x\n",
addr, (unsigned int) temp);

addr = &ir_set->erst_base[1];
temp = xhci_readl(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_base[1] = 0x%x\n",
addr, (unsigned int) temp);

addr = &ir_set->erst_dequeue[0];
temp = xhci_readl(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_dequeue[0] = 0x%x\n",
addr, (unsigned int) temp);
addr = &ir_set->erst_base;
temp_64 = xhci_read_64(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_base = @%08llx\n",
addr, temp_64);

addr = &ir_set->erst_dequeue[1];
temp = xhci_readl(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_dequeue[1] = 0x%x\n",
addr, (unsigned int) temp);
addr = &ir_set->erst_dequeue;
temp_64 = xhci_read_64(xhci, addr);
xhci_dbg(xhci, " %p: ir_set.erst_dequeue = @%08llx\n",
addr, temp_64);
}

void xhci_print_run_regs(struct xhci_hcd *xhci)
Expand Down Expand Up @@ -268,8 +259,7 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
xhci_dbg(xhci, "Link TRB:\n");
xhci_print_trb_offsets(xhci, trb);

address = trb->link.segment_ptr[0] +
(((u64) trb->link.segment_ptr[1]) << 32);
address = trb->link.segment_ptr;
xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);

xhci_dbg(xhci, "Interrupter target = 0x%x\n",
Expand All @@ -282,17 +272,15 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
(unsigned int) (trb->link.control & TRB_NO_SNOOP));
break;
case TRB_TYPE(TRB_TRANSFER):
address = trb->trans_event.buffer[0] +
(((u64) trb->trans_event.buffer[1]) << 32);
address = trb->trans_event.buffer;
/*
* FIXME: look at flags to figure out if it's an address or if
* the data is directly in the buffer field.
*/
xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
break;
case TRB_TYPE(TRB_COMPLETION):
address = trb->event_cmd.cmd_trb[0] +
(((u64) trb->event_cmd.cmd_trb[1]) << 32);
address = trb->event_cmd.cmd_trb;
xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
xhci_dbg(xhci, "Completion status = %u\n",
(unsigned int) GET_COMP_CODE(trb->event_cmd.status));
Expand Down Expand Up @@ -328,8 +316,8 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
for (i = 0; i < TRBS_PER_SEGMENT; ++i) {
trb = &seg->trbs[i];
xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", addr,
(unsigned int) trb->link.segment_ptr[0],
(unsigned int) trb->link.segment_ptr[1],
lower_32_bits(trb->link.segment_ptr),
upper_32_bits(trb->link.segment_ptr),
(unsigned int) trb->link.intr_target,
(unsigned int) trb->link.control);
addr += sizeof(*trb);
Expand Down Expand Up @@ -386,8 +374,8 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
entry = &erst->entries[i];
xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n",
(unsigned int) addr,
(unsigned int) entry->seg_addr[0],
(unsigned int) entry->seg_addr[1],
lower_32_bits(entry->seg_addr),
upper_32_bits(entry->seg_addr),
(unsigned int) entry->seg_size,
(unsigned int) entry->rsvd);
addr += sizeof(*entry);
Expand All @@ -396,12 +384,13 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)

void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci)
{
u32 val;
u64 val;

val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]);
xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = 0x%x\n", val);
val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[1]);
xhci_dbg(xhci, "// xHC command ring deq ptr high bits = 0x%x\n", val);
val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",
lower_32_bits(val));
xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",
upper_32_bits(val));
}

void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_addr_t dma, unsigned int last_ep)
Expand Down Expand Up @@ -462,14 +451,10 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_ad
&ctx->ep[i].ep_info2,
(unsigned long long)dma, ctx->ep[i].ep_info2);
dma += field_size;
xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[0]\n",
&ctx->ep[i].deq[0],
(unsigned long long)dma, ctx->ep[i].deq[0]);
dma += field_size;
xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[1]\n",
&ctx->ep[i].deq[1],
(unsigned long long)dma, ctx->ep[i].deq[1]);
dma += field_size;
xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08llx - deq\n",
&ctx->ep[i].deq,
(unsigned long long)dma, ctx->ep[i].deq);
dma += 2*field_size;
xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n",
&ctx->ep[i].tx_info,
(unsigned long long)dma, ctx->ep[i].tx_info);
Expand Down
43 changes: 19 additions & 24 deletions drivers/usb/host/xhci-hcd.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -226,6 +226,7 @@ int xhci_init(struct usb_hcd *hcd)
static void xhci_work(struct xhci_hcd *xhci)
{
u32 temp;
u64 temp_64;

/*
* Clear the op reg interrupt status first,
Expand All @@ -249,8 +250,8 @@ static void xhci_work(struct xhci_hcd *xhci)
xhci_handle_event(xhci);

/* Clear the event handler busy flag; the event ring should be empty. */
temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]);
temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
xhci_write_64(xhci, temp_64 & ~ERST_EHB, &xhci->ir_set->erst_dequeue);
/* Flush posted writes -- FIXME is this necessary? */
xhci_readl(xhci, &xhci->ir_set->irq_pending);
}
Expand Down Expand Up @@ -295,6 +296,7 @@ void xhci_event_ring_work(unsigned long arg)
{
unsigned long flags;
int temp;
u64 temp_64;
struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
int i, j;

Expand All @@ -311,9 +313,9 @@ void xhci_event_ring_work(unsigned long arg)
xhci_dbg(xhci, "Event ring:\n");
xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
temp &= ERST_PTR_MASK;
xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
temp_64 &= ~ERST_PTR_MASK;
xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
xhci_dbg(xhci, "Command ring:\n");
xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
Expand Down Expand Up @@ -356,6 +358,7 @@ void xhci_event_ring_work(unsigned long arg)
int xhci_run(struct usb_hcd *hcd)
{
u32 temp;
u64 temp_64;
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
void (*doorbell)(struct xhci_hcd *) = NULL;

Expand Down Expand Up @@ -416,11 +419,9 @@ int xhci_run(struct usb_hcd *hcd)
xhci_dbg(xhci, "Event ring:\n");
xhci_debug_ring(xhci, xhci->event_ring);
xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
temp &= ERST_PTR_MASK;
xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]);
xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp);
temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
temp_64 &= ~ERST_PTR_MASK;
xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);

temp = xhci_readl(xhci, &xhci->op_regs->command);
temp |= (CMD_RUN);
Expand Down Expand Up @@ -888,8 +889,7 @@ static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev)
ep_ctx = &virt_dev->in_ctx->ep[i];
ep_ctx->ep_info = 0;
ep_ctx->ep_info2 = 0;
ep_ctx->deq[0] = 0;
ep_ctx->deq[1] = 0;
ep_ctx->deq = 0;
ep_ctx->tx_info = 0;
}
}
Expand Down Expand Up @@ -1165,7 +1165,7 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
struct xhci_virt_device *virt_dev;
int ret = 0;
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
u32 temp;
u64 temp_64;

if (!udev->slot_id) {
xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
Expand Down Expand Up @@ -1227,18 +1227,13 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
if (ret) {
return ret;
}
temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[0]);
xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp);
temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]);
xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp);
xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n",
udev->slot_id,
&xhci->dcbaa->dev_context_ptrs[2*udev->slot_id],
xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]);
xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n",
temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
udev->slot_id,
&xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1],
xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]);
&xhci->dcbaa->dev_context_ptrs[udev->slot_id],
(unsigned long long)
xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
(unsigned long long)virt_dev->out_ctx_dma);
xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
Expand Down
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