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sfc: Remove support for SFN4111T, SFT9001 and Falcon GMAC
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SFN4111T never reached production and is not being used for internal
or customer testing.

Since we have no production Falcon boards using the SFT9001 or the
GMAC, remove support for them as well.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Ben Hutchings authored and David S. Miller committed Sep 22, 2010
1 parent a0741ca commit 8fbca79
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Showing 10 changed files with 56 additions and 893 deletions.
2 changes: 1 addition & 1 deletion drivers/net/sfc/Makefile
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
sfc-y += efx.o nic.o falcon.o siena.o tx.o rx.o filter.o \
falcon_gmac.o falcon_xmac.o mcdi_mac.o \
falcon_xmac.o mcdi_mac.o \
selftest.o ethtool.o qt202x_phy.o mdio_10g.o \
tenxpress.o falcon_boards.o mcdi.o mcdi_phy.o
sfc-$(CONFIG_SFC_MTD) += mtd.o
Expand Down
117 changes: 18 additions & 99 deletions drivers/net/sfc/falcon.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -446,30 +446,19 @@ static void falcon_reset_macs(struct efx_nic *efx)
/* It's not safe to use GLB_CTL_REG to reset the
* macs, so instead use the internal MAC resets
*/
if (!EFX_IS10G(efx)) {
EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 1);
efx_writeo(efx, &reg, FR_AB_GM_CFG1);
udelay(1000);

EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 0);
efx_writeo(efx, &reg, FR_AB_GM_CFG1);
udelay(1000);
return;
} else {
EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1);
efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);

for (count = 0; count < 10000; count++) {
efx_reado(efx, &reg, FR_AB_XM_GLB_CFG);
if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) ==
0)
return;
udelay(10);
}

netif_err(efx, hw, efx->net_dev,
"timed out waiting for XMAC core reset\n");
EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1);
efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);

for (count = 0; count < 10000; count++) {
efx_reado(efx, &reg, FR_AB_XM_GLB_CFG);
if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) ==
0)
return;
udelay(10);
}

netif_err(efx, hw, efx->net_dev,
"timed out waiting for XMAC core reset\n");
}

/* Mac stats will fail whist the TX fifo is draining */
Expand Down Expand Up @@ -508,7 +497,6 @@ static void falcon_reset_macs(struct efx_nic *efx)
* are re-enabled by the caller */
efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);

/* This can run even when the GMAC is selected */
falcon_setup_xaui(efx);
}

Expand Down Expand Up @@ -646,8 +634,6 @@ static void falcon_stats_timer_func(unsigned long context)
spin_unlock(&efx->stats_lock);
}

static void falcon_switch_mac(struct efx_nic *efx);

static bool falcon_loopback_link_poll(struct efx_nic *efx)
{
struct efx_link_state old_state = efx->link_state;
Expand All @@ -658,11 +644,7 @@ static bool falcon_loopback_link_poll(struct efx_nic *efx)
efx->link_state.fd = true;
efx->link_state.fc = efx->wanted_fc;
efx->link_state.up = true;

if (efx->loopback_mode == LOOPBACK_GMAC)
efx->link_state.speed = 1000;
else
efx->link_state.speed = 10000;
efx->link_state.speed = 10000;

return !efx_link_state_equal(&efx->link_state, &old_state);
}
Expand All @@ -685,7 +667,7 @@ static int falcon_reconfigure_port(struct efx_nic *efx)
falcon_stop_nic_stats(efx);
falcon_deconfigure_mac_wrapper(efx);

falcon_switch_mac(efx);
falcon_reset_macs(efx);

efx->phy_op->reconfigure(efx);
rc = efx->mac_op->reconfigure(efx);
Expand Down Expand Up @@ -835,69 +817,16 @@ static int falcon_mdio_read(struct net_device *net_dev,
return rc;
}

static void falcon_clock_mac(struct efx_nic *efx)
{
unsigned strap_val;
efx_oword_t nic_stat;

/* Configure the NIC generated MAC clock correctly */
efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
strap_val = EFX_IS10G(efx) ? 5 : 3;
if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1);
EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val);
efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT);
} else {
/* Falcon A1 does not support 1G/10G speed switching
* and must not be used with a PHY that does. */
BUG_ON(EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_PINS) !=
strap_val);
}
}

static void falcon_switch_mac(struct efx_nic *efx)
{
struct efx_mac_operations *old_mac_op = efx->mac_op;
struct falcon_nic_data *nic_data = efx->nic_data;
unsigned int stats_done_offset;

WARN_ON(!mutex_is_locked(&efx->mac_lock));
WARN_ON(nic_data->stats_disable_count == 0);

efx->mac_op = (EFX_IS10G(efx) ?
&falcon_xmac_operations : &falcon_gmac_operations);

if (EFX_IS10G(efx))
stats_done_offset = XgDmaDone_offset;
else
stats_done_offset = GDmaDone_offset;
nic_data->stats_dma_done = efx->stats_buffer.addr + stats_done_offset;

if (old_mac_op == efx->mac_op)
return;

falcon_clock_mac(efx);

netif_dbg(efx, hw, efx->net_dev, "selected %cMAC\n",
EFX_IS10G(efx) ? 'X' : 'G');
/* Not all macs support a mac-level link state */
efx->xmac_poll_required = false;
falcon_reset_macs(efx);
}

/* This call is responsible for hooking in the MAC and PHY operations */
static int falcon_probe_port(struct efx_nic *efx)
{
struct falcon_nic_data *nic_data = efx->nic_data;
int rc;

switch (efx->phy_type) {
case PHY_TYPE_SFX7101:
efx->phy_op = &falcon_sfx7101_phy_ops;
break;
case PHY_TYPE_SFT9001A:
case PHY_TYPE_SFT9001B:
efx->phy_op = &falcon_sft9001_phy_ops;
break;
case PHY_TYPE_QT2022C2:
case PHY_TYPE_QT2025C:
efx->phy_op = &falcon_qt202x_phy_ops;
Expand Down Expand Up @@ -937,6 +866,7 @@ static int falcon_probe_port(struct efx_nic *efx)
(u64)efx->stats_buffer.dma_addr,
efx->stats_buffer.addr,
(u64)virt_to_phys(efx->stats_buffer.addr));
nic_data->stats_dma_done = efx->stats_buffer.addr + XgDmaDone_offset;

return 0;
}
Expand Down Expand Up @@ -1201,7 +1131,7 @@ static void falcon_monitor(struct efx_nic *efx)
falcon_stop_nic_stats(efx);
falcon_deconfigure_mac_wrapper(efx);

falcon_switch_mac(efx);
falcon_reset_macs(efx);
rc = efx->mac_op->reconfigure(efx);
BUG_ON(rc);

Expand All @@ -1210,8 +1140,7 @@ static void falcon_monitor(struct efx_nic *efx)
efx_link_status_changed(efx);
}

if (EFX_IS10G(efx))
falcon_poll_xmac(efx);
falcon_poll_xmac(efx);
}

/* Zeroes out the SRAM contents. This routine must be called in
Expand Down Expand Up @@ -1604,16 +1533,6 @@ static int falcon_init_nic(struct efx_nic *efx)
EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1);
efx_writeo(efx, &temp, FR_AB_NIC_STAT);

/* Set the source of the GMAC clock */
if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) {
efx_reado(efx, &temp, FR_AB_GPIO_CTL);
EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true);
efx_writeo(efx, &temp, FR_AB_GPIO_CTL);
}

/* Select the correct MAC */
falcon_clock_mac(efx);

rc = falcon_reset_sram(efx);
if (rc)
return rc;
Expand Down
127 changes: 4 additions & 123 deletions drivers/net/sfc/falcon_boards.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,6 @@
/* Board types */
#define FALCON_BOARD_SFE4001 0x01
#define FALCON_BOARD_SFE4002 0x02
#define FALCON_BOARD_SFN4111T 0x51
#define FALCON_BOARD_SFN4112F 0x52

/* Board temperature is about 15°C above ambient when air flow is
Expand Down Expand Up @@ -142,17 +141,17 @@ static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
#endif /* CONFIG_SENSORS_LM87 */

/*****************************************************************************
* Support for the SFE4001 and SFN4111T NICs.
* Support for the SFE4001 NIC.
*
* The SFE4001 does not power-up fully at reset due to its high power
* consumption. We control its power via a PCA9539 I/O expander.
* Both boards have a MAX6647 temperature monitor which we expose to
* It also has a MAX6647 temperature monitor which we expose to
* the lm90 driver.
*
* This also provides minimal support for reflashing the PHY, which is
* initiated by resetting it with the FLASH_CFG_1 pin pulled down.
* On SFE4001 rev A2 and later this is connected to the 3V3X output of
* the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
* the IO-expander.
* We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
* exclusive with the network device being open.
*/
Expand Down Expand Up @@ -304,34 +303,6 @@ static int sfe4001_poweron(struct efx_nic *efx)
return rc;
}

static int sfn4111t_reset(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
efx_oword_t reg;

/* GPIO 3 and the GPIO register are shared with I2C, so block that */
i2c_lock_adapter(&board->i2c_adap);

/* Pull RST_N (GPIO 2) low then let it up again, setting the
* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
* output enables; the output levels should always be 0 (low)
* and we rely on external pull-ups. */
efx_reado(efx, &reg, FR_AB_GPIO_CTL);
EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
msleep(1000);
EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
!!(efx->phy_mode & PHY_MODE_SPECIAL));
efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
msleep(1);

i2c_unlock_adapter(&board->i2c_adap);

ssleep(1);
return 0;
}

static ssize_t show_phy_flash_cfg(struct device *dev,
struct device_attribute *attr, char *buf)
{
Expand Down Expand Up @@ -363,10 +334,7 @@ static ssize_t set_phy_flash_cfg(struct device *dev,
efx->phy_mode = new_mode;
if (new_mode & PHY_MODE_SPECIAL)
falcon_stop_nic_stats(efx);
if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
err = sfe4001_poweron(efx);
else
err = sfn4111t_reset(efx);
err = sfe4001_poweron(efx);
if (!err)
err = efx_reconfigure_port(efx);
if (!(new_mode & PHY_MODE_SPECIAL))
Expand Down Expand Up @@ -479,83 +447,6 @@ static int sfe4001_init(struct efx_nic *efx)
return rc;
}

static int sfn4111t_check_hw(struct efx_nic *efx)
{
s32 status;

/* If XAUI link is up then do not monitor */
if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
return 0;

/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
MAX664X_REG_RSL);
if (status < 0)
return -EIO;
if (status & 0x57)
return -ERANGE;
return 0;
}

static void sfn4111t_fini(struct efx_nic *efx)
{
netif_info(efx, drv, efx->net_dev, "%s\n", __func__);

device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
i2c_unregister_device(falcon_board(efx)->hwmon_client);
}

static struct i2c_board_info sfn4111t_a0_hwmon_info = {
I2C_BOARD_INFO("max6647", 0x4e),
};

static struct i2c_board_info sfn4111t_r5_hwmon_info = {
I2C_BOARD_INFO("max6646", 0x4d),
};

static void sfn4111t_init_phy(struct efx_nic *efx)
{
if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
if (sft9001_wait_boot(efx) != -EINVAL)
return;

efx->phy_mode = PHY_MODE_SPECIAL;
falcon_stop_nic_stats(efx);
}

sfn4111t_reset(efx);
sft9001_wait_boot(efx);
}

static int sfn4111t_init(struct efx_nic *efx)
{
struct falcon_board *board = falcon_board(efx);
int rc;

board->hwmon_client =
i2c_new_device(&board->i2c_adap,
(board->minor < 5) ?
&sfn4111t_a0_hwmon_info :
&sfn4111t_r5_hwmon_info);
if (!board->hwmon_client)
return -EIO;

rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
if (rc)
goto fail_hwmon;

if (efx->phy_mode & PHY_MODE_SPECIAL)
/* PHY may not generate a 156.25 MHz clock and MAC
* stats fetch will fail. */
falcon_stop_nic_stats(efx);

return 0;

fail_hwmon:
i2c_unregister_device(board->hwmon_client);
return rc;
}

/*****************************************************************************
* Support for the SFE4002
*
Expand Down Expand Up @@ -712,16 +603,6 @@ static const struct falcon_board_type board_types[] = {
.set_id_led = sfe4002_set_id_led,
.monitor = sfe4002_check_hw,
},
{
.id = FALCON_BOARD_SFN4111T,
.ref_model = "SFN4111T",
.gen_type = "100/1000/10GBASE-T adapter",
.init = sfn4111t_init,
.init_phy = sfn4111t_init_phy,
.fini = sfn4111t_fini,
.set_id_led = tenxpress_set_id_led,
.monitor = sfn4111t_check_hw,
},
{
.id = FALCON_BOARD_SFN4112F,
.ref_model = "SFN4112F",
Expand Down
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