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yaml
---
r: 68183
b: refs/heads/master
c: 28b146c
h: refs/heads/master
i:
  68181: 7b24758
  68179: aac9e0b
  68175: a5f5b9c
v: v3
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Magnus Damm authored and Paul Mundt committed Sep 21, 2007
1 parent 204482f commit 8fc8d04
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2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 70e8be0a4e21f71e654bea2e5ec4789e976a796b
refs/heads/master: 28b146c84ed571043f473d2ac2f2a27e48fda7d1
183 changes: 130 additions & 53 deletions trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c
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Expand Up @@ -10,17 +10,136 @@
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/serial.h>
#include <asm/sci.h>

enum {
UNUSED = 0,

/* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
DMAC_DEI4, DMAC_DEI5,
IPSEC,
EDMAC0, EDMAC1, EDMAC2,
SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI,
SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI,
TMU0, TMU1, TMU2,
RTC_ATI, RTC_PRI, RTC_CUI,
WDT,
REF,

/* interrupt groups */
RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1,
};

static struct intc_vect vectors[] = {
INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920),
INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960),
INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0),
INTC_VECT(IPSEC, 0xbe0),
INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
INTC_VECT(EDMAC2, 0xc40),
INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20),
INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60),
INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0),
INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440),
INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
INTC_VECT(RTC_CUI, 0x4c0),
INTC_VECT(WDT, 0x560),
INTC_VECT(REF, 0x580),
};

static struct intc_group groups[] = {
INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5),
INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI),
INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
};

static struct intc_prio priorities[] = {
INTC_PRIO(DMAC1, 7),
INTC_PRIO(DMAC2, 7),
INTC_PRIO(SCIF0, 3),
INTC_PRIO(SCIF1, 3),
INTC_PRIO(SIOF0, 3),
INTC_PRIO(SIOF1, 3),
INTC_PRIO(EDMAC0, 5),
INTC_PRIO(EDMAC1, 5),
INTC_PRIO(EDMAC2, 5),
};

static struct intc_prio_reg prio_registers[] = {
{ 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
{ 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
{ 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } },
{ 0xa400001a, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
{ 0xa4080000, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
{ 0xa4080002, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
{ 0xa4080004, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
{ 0xa4080006, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
};

static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
priorities, NULL, prio_registers, NULL);

static struct intc_vect vectors_irq[] = {
INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
};

static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
priorities, NULL, prio_registers, NULL);

static struct resource rtc_resources[] = {
[0] = {
.start = 0xa413fec0,
.end = 0xa413fec0 + 0x1e,
.flags = IORESOURCE_IO,
},
[1] = {
.start = 20,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = 21,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = 22,
.flags = IORESOURCE_IRQ,
},
};

static struct platform_device rtc_device = {
.name = "sh-rtc",
.id = -1,
.num_resources = ARRAY_SIZE(rtc_resources),
.resource = rtc_resources,
};

static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4400000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 52, 53, 55, 54 },
}, {
.mapbase = 0xa4420000,
.mapbase = 0xa4410000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 56, 57, 59, 58 },
Expand All @@ -40,6 +159,7 @@ static struct platform_device sci_device = {

static struct platform_device *sh7710_devices[] __initdata = {
&sci_device,
&rtc_device,
};

static int __init sh7710_devices_setup(void)
Expand All @@ -49,59 +169,16 @@ static int __init sh7710_devices_setup(void)
}
__initcall(sh7710_devices_setup);

static struct ipr_data ipr_irq_table[] = {
/* IRQ, IPR-idx, shift, priority */
{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
{ 17, 0, 8, 2 }, /* TMU1 TUNI */
{ 18, 0, 4, 2 }, /* TMU2 TUNI */
{ 27, 1, 12, 2 }, /* WDT ITI */
{ 20, 0, 0, 2 }, /* RTC ATI (alarm) */
{ 21, 0, 0, 2 }, /* RTC PRI (period) */
{ 22, 0, 0, 2 }, /* RTC CUI (carry) */
{ 48, 4, 12, 7 }, /* DMAC DMTE0 */
{ 49, 4, 12, 7 }, /* DMAC DMTE1 */
{ 50, 4, 12, 7 }, /* DMAC DMTE2 */
{ 51, 4, 12, 7 }, /* DMAC DMTE3 */
{ 52, 4, 8, 3 }, /* SCIF0 ERI */
{ 53, 4, 8, 3 }, /* SCIF0 RXI */
{ 54, 4, 8, 3 }, /* SCIF0 BRI */
{ 55, 4, 8, 3 }, /* SCIF0 TXI */
{ 56, 4, 4, 3 }, /* SCIF1 ERI */
{ 57, 4, 4, 3 }, /* SCIF1 RXI */
{ 58, 4, 4, 3 }, /* SCIF1 BRI */
{ 59, 4, 4, 3 }, /* SCIF1 TXI */
{ 76, 5, 8, 7 }, /* DMAC DMTE4 */
{ 77, 5, 8, 7 }, /* DMAC DMTE5 */
{ 80, 6, 12, 5 }, /* EDMAC EINT0 */
{ 81, 6, 8, 5 }, /* EDMAC EINT1 */
{ 82, 6, 4, 5 }, /* EDMAC EINT2 */
};

static unsigned long ipr_offsets[] = {
0xA414FEE2, /* 0: IPRA */
0xA414FEE4, /* 1: IPRB */
0xA4140016, /* 2: IPRC */
0xA4140018, /* 3: IPRD */
0xA414001A, /* 4: IPRE */
0xA4080000, /* 5: IPRF */
0xA4080002, /* 6: IPRG */
0xA4080004, /* 7: IPRH */
0xA4080006, /* 8: IPRI */
};

static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),

.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),

.chip = {
.name = "IPR-sh7710",
},
};
void __init plat_irq_setup_pins(int mode)
{
if (mode == IRQ_MODE_IRQ) {
register_intc_controller(&intc_desc_irq);
return;
}
BUG();
}

void __init plat_irq_setup(void)
{
register_ipr_controller(&ipr_irq_desc);
register_intc_controller(&intc_desc);
}
4 changes: 2 additions & 2 deletions trunk/arch/sh/mm/Kconfig
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Expand Up @@ -98,15 +98,15 @@ config CPU_SUBTYPE_SH7709
config CPU_SUBTYPE_SH7710
bool "Support SH7710 processor"
select CPU_SH3
select CPU_HAS_IPR_IRQ
select CPU_HAS_INTC_IRQ
select CPU_HAS_DSP
help
Select SH7710 if you have a SH3-DSP SH7710 CPU.

config CPU_SUBTYPE_SH7712
bool "Support SH7712 processor"
select CPU_SH3
select CPU_HAS_IPR_IRQ
select CPU_HAS_INTC_IRQ
select CPU_HAS_DSP
help
Select SH7712 if you have a SH3-DSP SH7712 CPU.
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