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[PATCH] x86-64: __send_IPI_dest_field - x86_64
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Implement __send_IPI_dest_field which can be used to send IPIs when the
"destination shorthand" field of the ICR is set to 00 (destination
field). Use it whenever possible.

Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>
Signed-off-by: Andi Kleen <ak@suse.de>
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Fernando Luis [** ISO-8859-1 charset **] V�zquezCao authored and Andi Kleen committed May 2, 2007
1 parent 45ae5e9 commit 9062d88
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Showing 2 changed files with 33 additions and 44 deletions.
23 changes: 1 addition & 22 deletions arch/x86_64/kernel/genapic_flat.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,31 +61,10 @@ static void flat_init_apic_ldr(void)
static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
{
unsigned long mask = cpus_addr(cpumask)[0];
unsigned long cfg;
unsigned long flags;

local_irq_save(flags);

/*
* Wait for idle.
*/
apic_wait_icr_idle();

/*
* prepare target chip field
*/
cfg = __prepare_ICR2(mask);
apic_write(APIC_ICR2, cfg);

/*
* program the ICR
*/
cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);

/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write(APIC_ICR, cfg);
__send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
local_irq_restore(flags);
}

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54 changes: 32 additions & 22 deletions include/asm-x86_64/ipi.h
Original file line number Diff line number Diff line change
Expand Up @@ -74,10 +74,39 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign
apic_write(APIC_ICR, cfg);
}

/*
* This is used to send an IPI with no shorthand notation (the destination is
* specified in bits 56 to 63 of the ICR).
*/
static inline void __send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
{
unsigned long cfg;

/*
* Wait for idle.
*/
apic_wait_icr_idle();

/*
* prepare target chip field
*/
cfg = __prepare_ICR2(mask);
apic_write(APIC_ICR2, cfg);

/*
* program the ICR
*/
cfg = __prepare_ICR(0, vector, dest);

/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write(APIC_ICR, cfg);
}

static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
{
unsigned long cfg, flags;
unsigned long flags;
unsigned long query_cpu;

/*
Expand All @@ -86,28 +115,9 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
* - mbligh
*/
local_irq_save(flags);

for_each_cpu_mask(query_cpu, mask) {
/*
* Wait for idle.
*/
apic_wait_icr_idle();

/*
* prepare target chip field
*/
cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
apic_write(APIC_ICR2, cfg);

/*
* program the ICR
*/
cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL);

/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write(APIC_ICR, cfg);
__send_IPI_dest_field(x86_cpu_to_apicid[query_cpu],
vector, APIC_DEST_PHYSICAL);
}
local_irq_restore(flags);
}
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