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yaml
---
r: 286870
b: refs/heads/master
c: 14f991a
h: refs/heads/master
v: v3
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Jean-Christophe PLAGNIOL-VILLARD authored and Nicolas Ferre committed Jan 20, 2012
1 parent 47ae6f7 commit 91ac2ae
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Showing 7 changed files with 49 additions and 14 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: e9f68b5cc6160a473fc668054fd13f435fd4508b
refs/heads/master: 14f991a730f453a1c8f114ccb686f83e158fdd92
5 changes: 5 additions & 0 deletions trunk/arch/arm/mach-at91/Kconfig
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Expand Up @@ -21,6 +21,9 @@ config HAVE_AT91_USART5
config AT91_SAM9_ALT_RESET
bool

config AT91_SAM9G45_RESET
bool

menu "Atmel AT91 System-on-Chip"

choice
Expand Down Expand Up @@ -97,6 +100,7 @@ config ARCH_AT91SAM9G45
select HAVE_FB_ATMEL
select HAVE_NET_MACB
select HAVE_AT91_DBGU1
select AT91_SAM9G45_RESET

config ARCH_AT91CAP9
bool "AT91CAP9"
Expand All @@ -105,6 +109,7 @@ config ARCH_AT91CAP9
select HAVE_FB_ATMEL
select HAVE_NET_MACB
select HAVE_AT91_DBGU1
select AT91_SAM9G45_RESET

config ARCH_AT91X40
bool "AT91x40"
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1 change: 1 addition & 0 deletions trunk/arch/arm/mach-at91/Makefile
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Expand Up @@ -9,6 +9,7 @@ obj- :=

obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o

# CPU-specific support
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
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8 changes: 1 addition & 7 deletions trunk/arch/arm/mach-at91/at91cap9.c
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Expand Up @@ -21,7 +21,6 @@
#include <mach/cpu.h>
#include <mach/at91cap9.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>

#include "soc.h"
#include "generic.h"
Expand Down Expand Up @@ -314,11 +313,6 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
}
};

static void at91cap9_restart(char mode, const char *cmd)
{
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
}

/* --------------------------------------------------------------------
* AT91CAP9 processor initialization
* -------------------------------------------------------------------- */
Expand All @@ -338,7 +332,7 @@ static void __init at91cap9_ioremap_registers(void)

static void __init at91cap9_initialize(void)
{
arm_pm_restart = at91cap9_restart;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);

/* Register GPIO subsystem */
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6 changes: 0 additions & 6 deletions trunk/arch/arm/mach-at91/at91sam9g45.c
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Expand Up @@ -18,7 +18,6 @@
#include <asm/mach/map.h>
#include <mach/at91sam9g45.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
#include <mach/cpu.h>

#include "soc.h"
Expand Down Expand Up @@ -318,11 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
}
};

static void at91sam9g45_restart(char mode, const char *cmd)
{
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
}

/* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
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40 changes: 40 additions & 0 deletions trunk/arch/arm/mach-at91/at91sam9g45_reset.S
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@@ -0,0 +1,40 @@
/*
* reset AT91SAM9G45 as per errata
*
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
*
* unless the SDRAM is cleanly shutdown before we hit the
* reset register it can be left driving the data bus and
* killing the chance of a subsequent boot from NAND
*
* GPLv2 Only
*/

#include <linux/linkage.h>
#include <mach/hardware.h>
#include <mach/at91sam9_ddrsdr.h>
#include <mach/at91_rstc.h>

.arm

.globl at91sam9g45_restart

at91sam9g45_restart:
ldr r0, .at91_va_base_sdramc0 @ preload constants
ldr r1, =at91_rstc_base
ldr r1, [r1]

mov r2, #1
mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST

.balign 32 @ align to cache line

str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
str r4, [r1, #AT91_RSTC_CR] @ reset processor

b .

.at91_va_base_sdramc0:
.word AT91_VA_BASE_SYS + AT91_DDRSDRC0
1 change: 1 addition & 0 deletions trunk/arch/arm/mach-at91/generic.h
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Expand Up @@ -60,6 +60,7 @@ extern void at91_irq_resume(void);
/* reset */
extern void at91_ioremap_rstc(u32 base_addr);
extern void at91sam9_alt_restart(char, const char *);
extern void at91sam9g45_restart(char, const char *);

/* shutdown */
extern void at91_ioremap_shdwc(u32 base_addr);
Expand Down

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