---

yaml
---
r: 370527
b: refs/heads/master
c: d8a28ed
h: refs/heads/master
i:
  370525: 64d5ddb
  370523: c2451bf
  370519: 7bcecb3
  370511: ff464ae
  370495: 25039bb
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3b94afa38350ad5b592df5b6539a20a253e04b53
+refs/heads/master: d8a28ed1bc06128f8761b332c74759db1dc7d82c

trunk/arch/arm/mach-shmobile/smp-emev2.c

@@ -32,8 +32,9 @@
 
 #define EMEV2_SCU_BASE 0x1e000000
 
+static void __iomem *shmobile_scu_base;
+
 static DEFINE_SPINLOCK(scu_lock);
-static void __iomem *scu_base;
 
 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
 {
@@ -42,10 +43,10 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
 	/* we assume this code is running on a different cpu
 	 * than the one that is changing coherency setting */
 	spin_lock(&scu_lock);
-	tmp = readl(scu_base + 8);
+	tmp = readl(shmobile_scu_base + 8);
 	tmp &= ~clr;
 	tmp |= set;
-	writel(tmp, scu_base + 8);
+	writel(tmp, shmobile_scu_base + 8);
 	spin_unlock(&scu_lock);
 
 }
@@ -70,7 +71,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
 {
 	int cpu = cpu_logical_map(0);
 
-	scu_enable(scu_base);
+	scu_enable(shmobile_scu_base);
 
 	/* Tell ROM loader about our vector (in headsmp.S) */
 	emev2_set_boot_vector(__pa(shmobile_secondary_vector));
@@ -83,12 +84,12 @@ static void __init emev2_smp_init_cpus(void)
 {
 	unsigned int ncores;
 
-	if (!scu_base) {
-		scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
+	if (!shmobile_scu_base) {
+		shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
 		emev2_clock_init(); /* need ioremapped SMU */
 	}
 
-	ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+	ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
 
 	shmobile_smp_init_cpus(ncores);
 }