---

yaml
---
r: 243052
b: refs/heads/master
c: 0cb3fcd
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 32836e082b25f17e7b09f11335b34b039c7568d2
+refs/heads/master: 0cb3fcd72cc3e6dd88f0e769746d294e5e6bafa9

trunk/arch/arm/Kconfig

@@ -2009,7 +2009,6 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 
 config ARCH_SUSPEND_POSSIBLE
-	depends on !ARCH_S5P64X0 && !ARCH_S5P6442
 	def_bool y
 
 endmenu

trunk/arch/arm/mach-exynos4/Kconfig

@@ -20,11 +20,6 @@ config EXYNOS4_MCT
 	help
 	  Use MCT (Multi Core Timer) as kernel timers
 
-config EXYNOS4_DEV_AHCI
-	bool
-	help
-	  Compile in platform device definitions for AHCI
-
 config EXYNOS4_DEV_PD
 	bool
 	help
@@ -139,9 +134,9 @@ config MACH_ARMLEX4210
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_HSMMC3
-	select EXYNOS4_DEV_AHCI
 	select EXYNOS4_DEV_SYSMMU
 	select EXYNOS4_SETUP_SDHCI
+	select SATA_AHCI_PLATFORM
 	help
 	  Machine support for Samsung ARMLEX4210 based on EXYNOS4210
 

trunk/arch/arm/mach-exynos4/Makefile

@@ -39,7 +39,6 @@ obj-$(CONFIG_MACH_NURI)			+= mach-nuri.o
 # device support
 
 obj-y					+= dev-audio.o
-obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_PD)		+= dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)	+= dev-sysmmu.o
 
@@ -54,3 +53,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7)	+= setup-i2c7.o
 obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)	+= setup-keypad.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI)	+= setup-sdhci.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
+obj-$(CONFIG_SATA_AHCI_PLATFORM)	+= dev-ahci.o

trunk/arch/arm/mach-exynos4/include/mach/debug-macro.S

@@ -21,8 +21,8 @@
 	 */
 
 	.macro addruart, rp, rv
-		ldr	\rp, = S3C_PA_UART
-		ldr	\rv, = S3C_VA_UART
+		ldreq	\rp, = S3C_PA_UART
+		ldrne	\rv, = S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
 		add	\rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
 		add	\rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)

trunk/arch/arm/mach-exynos4/mach-smdkc210.c

@@ -125,7 +125,7 @@ static struct resource smdkc210_smsc911x_resources[] = {
 };
 
 static struct smsc911x_platform_config smsc9215_config = {
-	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
 	.flags		= SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 	.phy_interface	= PHY_INTERFACE_MODE_MII,

trunk/arch/arm/mach-exynos4/mach-smdkv310.c

@@ -127,7 +127,7 @@ static struct resource smdkv310_smsc911x_resources[] = {
 };
 
 static struct smsc911x_platform_config smsc9215_config = {
-	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
 	.flags		= SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 	.phy_interface	= PHY_INTERFACE_MODE_MII,

trunk/arch/arm/mach-s5p64x0/cpu.c

@@ -119,7 +119,7 @@ void __init s5p6450_map_io(void)
 	s3c_adc_setname("s3c64xx-adc");
 
 	iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-	iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
+	iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc));
 }
 
 /*

trunk/arch/arm/mach-s5pv210/include/mach/irqs.h

@@ -99,9 +99,9 @@
 #define IRQ_TC			IRQ_PENDN
 #define IRQ_KEYPAD		S5P_IRQ_VIC2(25)
 #define IRQ_CG			S5P_IRQ_VIC2(26)
-#define IRQ_SSS_INT		S5P_IRQ_VIC2(27)
-#define IRQ_SSS_HASH		S5P_IRQ_VIC2(28)
-#define IRQ_PCM2		S5P_IRQ_VIC2(29)
+#define IRQ_SEC			S5P_IRQ_VIC2(27)
+#define IRQ_SECRX		S5P_IRQ_VIC2(28)
+#define IRQ_SECTX		S5P_IRQ_VIC2(29)
 #define IRQ_SDMIRQ		S5P_IRQ_VIC2(30)
 #define IRQ_SDMFIQ		S5P_IRQ_VIC2(31)
 

trunk/arch/arm/mach-s5pv210/mach-smdkv210.c

@@ -44,6 +44,7 @@
 #include <plat/keypad.h>
 #include <plat/pm.h>
 #include <plat/fb.h>
+#include <plat/gpio-cfg.h>
 #include <plat/s5p-time.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */

trunk/arch/arm/plat-s5p/cpu.c

@@ -39,23 +39,23 @@ static const char name_exynos4210[] = "EXYNOS4210";
 static struct cpu_table cpu_ids[] __initdata = {
 	{
 		.idcode		= 0x56440100,
-		.idmask		= 0xfffff000,
+		.idmask		= 0xffffff00,
 		.map_io		= s5p6440_map_io,
 		.init_clocks	= s5p6440_init_clocks,
 		.init_uarts	= s5p6440_init_uarts,
 		.init		= s5p64x0_init,
 		.name		= name_s5p6440,
 	}, {
 		.idcode		= 0x36442000,
-		.idmask		= 0xfffff000,
+		.idmask		= 0xffffff00,
 		.map_io		= s5p6442_map_io,
 		.init_clocks	= s5p6442_init_clocks,
 		.init_uarts	= s5p6442_init_uarts,
 		.init		= s5p6442_init,
 		.name		= name_s5p6442,
 	}, {
 		.idcode		= 0x36450000,
-		.idmask		= 0xfffff000,
+		.idmask		= 0xffffff00,
 		.map_io		= s5p6450_map_io,
 		.init_clocks	= s5p6450_init_clocks,
 		.init_uarts	= s5p6450_init_uarts,
@@ -79,7 +79,7 @@ static struct cpu_table cpu_ids[] __initdata = {
 		.name		= name_s5pv210,
 	}, {
 		.idcode		= 0x43210000,
-		.idmask		= 0xfffe0000,
+		.idmask		= 0xfffff000,
 		.map_io		= exynos4_map_io,
 		.init_clocks	= exynos4_init_clocks,
 		.init_uarts	= exynos4_init_uarts,

trunk/arch/arm/plat-samsung/init.c

@@ -36,7 +36,7 @@ static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
 						unsigned int count)
 {
 	for (; count != 0; count--, tab++) {
-		if ((idcode & tab->idmask) == (tab->idcode & tab->idmask))
+		if ((idcode & tab->idmask) == tab->idcode)
 			return tab;
 	}
 

trunk/arch/score/Kconfig

@@ -3,8 +3,6 @@ menu "Machine selection"
 config SCORE
        def_bool y
        select HAVE_GENERIC_HARDIRQS
-       select GENERIC_HARDIRQS_NO_DEPRECATED
-       select GENERIC_IRQ_SHOW
 
 choice
 	prompt "System type"

trunk/arch/score/include/asm/irqflags.h

@@ -29,7 +29,7 @@ static inline unsigned long arch_local_save_flags(void)
 
 static inline unsigned long arch_local_irq_save(void)
 {
-	unsigned long flags;
+	unsigned long flags
 
 	asm volatile(
 		"	mfcr	r8, cr0		\n"

trunk/arch/score/kernel/irq.c

@@ -52,9 +52,9 @@ asmlinkage void do_IRQ(int irq)
 	irq_exit();
 }
 
-static void score_mask(struct irq_data *d)
+static void score_mask(unsigned int irq_nr)
 {
-	unsigned int irq_source = 63 - d->irq;
+	unsigned int irq_source = 63 - irq_nr;
 
 	if (irq_source < 32)
 		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \
@@ -64,9 +64,9 @@ static void score_mask(struct irq_data *d)
 			(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
 }
 
-static void score_unmask(struct irq_data *d)
+static void score_unmask(unsigned int irq_nr)
 {
-	unsigned int irq_source = 63 - d->irq;
+	unsigned int irq_source = 63 - irq_nr;
 
 	if (irq_source < 32)
 		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \
@@ -78,9 +78,9 @@ static void score_unmask(struct irq_data *d)
 
 struct irq_chip score_irq_chip = {
 	.name		= "Score7-level",
-	.irq_mask	= score_mask,
-	.irq_mask_ack	= score_mask,
-	.irq_unmask	= score_unmask,
+	.mask		= score_mask,
+	.mask_ack	= score_mask,
+	.unmask		= score_unmask,
 };
 
 /*
@@ -92,7 +92,7 @@ void __init init_IRQ(void)
 	unsigned long target_addr;
 
 	for (index = 0; index < NR_IRQS; ++index)
-		irq_set_chip_and_handler(index, &score_irq_chip,
+		set_irq_chip_and_handler(index, &score_irq_chip,
 					 handle_level_irq);
 
 	for (target_addr = IRQ_VECTOR_BASE_ADDR;
@@ -109,3 +109,40 @@ void __init init_IRQ(void)
 		: : "r" (EXCEPTION_VECTOR_BASE_ADDR | \
 			VECTOR_ADDRESS_OFFSET_MODE16));
 }
+
+/*
+ * Generic, controller-independent functions:
+ */
+int show_interrupts(struct seq_file *p, void *v)
+{
+	int i = *(loff_t *)v, cpu;
+	struct irqaction *action;
+	unsigned long flags;
+
+	if (i == 0) {
+		seq_puts(p, "           ");
+		for_each_online_cpu(cpu)
+			seq_printf(p, "CPU%d       ", cpu);
+		seq_putc(p, '\n');
+	}
+
+	if (i < NR_IRQS) {
+		spin_lock_irqsave(&irq_desc[i].lock, flags);
+		action = irq_desc[i].action;
+		if (!action)
+			goto unlock;
+
+		seq_printf(p, "%3d: ", i);
+		seq_printf(p, "%10u ", kstat_irqs(i));
+		seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
+		seq_printf(p, "  %s", action->name);
+		for (action = action->next; action; action = action->next)
+			seq_printf(p, ", %s", action->name);
+
+		seq_putc(p, '\n');
+unlock:
+		spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+	}
+
+	return 0;
+}

trunk/arch/tile/Kconfig

@@ -12,7 +12,6 @@ config TILE
 	select GENERIC_IRQ_PROBE
 	select GENERIC_PENDING_IRQ if SMP
 	select GENERIC_HARDIRQS_NO_DEPRECATED
-	select GENERIC_IRQ_SHOW
 
 # FIXME: investigate whether we need/want these options.
 #	select HAVE_IOREMAP_PROT

trunk/arch/tile/kernel/irq.c

@@ -241,14 +241,14 @@ void tile_irq_activate(unsigned int irq, int tile_irq_type)
 	irq_flow_handler_t handle = handle_level_irq;
 	if (tile_irq_type == TILE_IRQ_PERCPU)
 		handle = handle_percpu_irq;
-	irq_set_chip_and_handler(irq, &tile_irq_chip, handle);
+	set_irq_chip_and_handler(irq, &tile_irq_chip, handle);
 
 	/*
 	 * Flag interrupts that are hardware-cleared so that ack()
 	 * won't clear them.
 	 */
 	if (tile_irq_type == TILE_IRQ_HW_CLEAR)
-		irq_set_chip_data(irq, (void *)IS_HW_CLEARED);
+		set_irq_chip_data(irq, (void *)IS_HW_CLEARED);
 }
 EXPORT_SYMBOL(tile_irq_activate);
 
@@ -262,6 +262,47 @@ void ack_bad_irq(unsigned int irq)
  * Generic, controller-independent functions:
  */
 
+int show_interrupts(struct seq_file *p, void *v)
+{
+	int i = *(loff_t *) v, j;
+	struct irqaction *action;
+	unsigned long flags;
+
+	if (i == 0) {
+		seq_printf(p, "           ");
+		for (j = 0; j < NR_CPUS; j++)
+			if (cpu_online(j))
+				seq_printf(p, "CPU%-8d", j);
+		seq_putc(p, '\n');
+	}
+
+	if (i < NR_IRQS) {
+		struct irq_desc *desc = irq_to_desc(i);
+
+		raw_spin_lock_irqsave(&desc->lock, flags);
+		action = desc->action;
+		if (!action)
+			goto skip;
+		seq_printf(p, "%3d: ", i);
+#ifndef CONFIG_SMP
+		seq_printf(p, "%10u ", kstat_irqs(i));
+#else
+		for_each_online_cpu(j)
+			seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
+#endif
+		seq_printf(p, " %14s", get_irq_desc_chip(desc)->name);
+		seq_printf(p, "  %s", action->name);
+
+		for (action = action->next; action; action = action->next)
+			seq_printf(p, ", %s", action->name);
+
+		seq_putc(p, '\n');
+skip:
+		raw_spin_unlock_irqrestore(&desc->lock, flags);
+	}
+	return 0;
+}
+
 #if CHIP_HAS_IPI()
 int create_irq(void)
 {

trunk/arch/x86/crypto/aesni-intel_asm.S

@@ -1612,7 +1612,6 @@ _zero_cipher_left_encrypt:
         movdqa SHUF_MASK(%rip), %xmm10
 	PSHUFB_XMM %xmm10, %xmm0
 
-
 	ENCRYPT_SINGLE_BLOCK	%xmm0, %xmm1        # Encrypt(K, Yn)
 	sub $16, %r11
 	add %r13, %r11
@@ -1635,9 +1634,7 @@ _zero_cipher_left_encrypt:
 	# GHASH computation for the last <16 byte block
 	sub	%r13, %r11
 	add	$16, %r11
-
-	movdqa SHUF_MASK(%rip), %xmm10
-	PSHUFB_XMM %xmm10, %xmm0
+	PSHUFB_XMM %xmm10, %xmm1
 
 	# shuffle xmm0 back to output as ciphertext