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yaml
---
r: 225252
b: refs/heads/master
c: 4ddfcd7
h: refs/heads/master
v: v3
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Felix Fietkau authored and John W. Linville committed Dec 13, 2010
1 parent e3e80b9 commit 9247dd4
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Showing 9 changed files with 78 additions and 139 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 040b74f741b20dbf07359716d5c540356a036ade
refs/heads/master: 4ddfcd7daf57247ff718b849a152d97a80b7ae4d
22 changes: 11 additions & 11 deletions trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ static const struct ar9300_eeprom ar9300_default = {
.regDmn = { LE16(0), LE16(0x1f) },
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
.opCapFlags = {
.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
.eepMisc = 0,
},
.rfSilent = 0,
Expand Down Expand Up @@ -649,7 +649,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
.regDmn = { LE16(0), LE16(0x1f) },
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
.opCapFlags = {
.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
.eepMisc = 0,
},
.rfSilent = 0,
Expand Down Expand Up @@ -1227,7 +1227,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
.regDmn = { LE16(0), LE16(0x1f) },
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
.opCapFlags = {
.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
.eepMisc = 0,
},
.rfSilent = 0,
Expand Down Expand Up @@ -1805,7 +1805,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
.regDmn = { LE16(0), LE16(0x1f) },
.txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
.opCapFlags = {
.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
.eepMisc = 0,
},
.rfSilent = 0,
Expand Down Expand Up @@ -2382,7 +2382,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
.regDmn = { LE16(0), LE16(0x1f) },
.txrxMask = 0x33, /* 4 bits tx and 4 bits rx */
.opCapFlags = {
.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
.opFlags = AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A,
.eepMisc = 0,
},
.rfSilent = 0,
Expand Down Expand Up @@ -2974,7 +2974,7 @@ static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id)

static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
{
if (fbin == AR9300_BCHAN_UNUSED)
if (fbin == AR5416_BCHAN_UNUSED)
return fbin;

return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
Expand Down Expand Up @@ -4485,7 +4485,7 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
}

return AR9300_MAX_RATE_POWER;
return MAX_RATE_POWER;
}

/*
Expand All @@ -4494,7 +4494,7 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
static u16 ar9003_hw_get_max_edge_power(struct ar9300_eeprom *eep,
u16 freq, int idx, bool is2GHz)
{
u16 twiceMaxEdgePower = AR9300_MAX_RATE_POWER;
u16 twiceMaxEdgePower = MAX_RATE_POWER;
u8 *ctl_freqbin = is2GHz ?
&eep->ctl_freqbin_2G[idx][0] :
&eep->ctl_freqbin_5G[idx][0];
Expand All @@ -4504,7 +4504,7 @@ static u16 ar9003_hw_get_max_edge_power(struct ar9300_eeprom *eep,

/* Get the edge power */
for (edge = 0;
(edge < num_edges) && (ctl_freqbin[edge] != AR9300_BCHAN_UNUSED);
(edge < num_edges) && (ctl_freqbin[edge] != AR5416_BCHAN_UNUSED);
edge++) {
/*
* If there's an exact channel match or an inband flag set
Expand Down Expand Up @@ -4542,9 +4542,9 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
struct ath_common *common = ath9k_hw_common(ah);
struct ar9300_eeprom *pEepData = &ah->eeprom.ar9300_eep;
u16 twiceMaxEdgePower = AR9300_MAX_RATE_POWER;
u16 twiceMaxEdgePower = MAX_RATE_POWER;
static const u16 tpScaleReductionTable[5] = {
0, 3, 6, 9, AR9300_MAX_RATE_POWER
0, 3, 6, 9, MAX_RATE_POWER
};
int i;
int16_t twiceLargestAntenna;
Expand Down
37 changes: 1 addition & 36 deletions trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
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Original file line number Diff line number Diff line change
Expand Up @@ -20,48 +20,17 @@
/* #define AR9300_NUM_CTLS 21 */
#define AR9300_NUM_CTLS_5G 9
#define AR9300_NUM_CTLS_2G 12
#define AR9300_CTL_MODE_M 0xF
#define AR9300_NUM_BAND_EDGES_5G 8
#define AR9300_NUM_BAND_EDGES_2G 4
#define AR9300_NUM_PD_GAINS 4
#define AR9300_PD_GAINS_IN_MASK 4
#define AR9300_PD_GAIN_ICEPTS 5
#define AR9300_EEPROM_MODAL_SPURS 5
#define AR9300_MAX_RATE_POWER 63
#define AR9300_NUM_PDADC_VALUES 128
#define AR9300_NUM_RATES 16
#define AR9300_BCHAN_UNUSED 0xFF
#define AR9300_MAX_PWR_RANGE_IN_HALF_DB 64
#define AR9300_OPFLAGS_11A 0x01
#define AR9300_OPFLAGS_11G 0x02
#define AR9300_OPFLAGS_5G_HT40 0x04
#define AR9300_OPFLAGS_2G_HT40 0x08
#define AR9300_OPFLAGS_5G_HT20 0x10
#define AR9300_OPFLAGS_2G_HT20 0x20
#define AR9300_EEPMISC_BIG_ENDIAN 0x01
#define AR9300_EEPMISC_WOW 0x02
#define AR9300_CUSTOMER_DATA_SIZE 20

#define FREQ2FBIN(x, y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
#define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x))
#define AR9300_MAX_CHAINS 3
#define AR9300_ANT_16S 25
#define AR9300_FUTURE_MODAL_SZ 6

#define AR9300_NUM_ANT_CHAIN_FIELDS 7
#define AR9300_NUM_ANT_COMMON_FIELDS 4
#define AR9300_SIZE_ANT_CHAIN_FIELD 3
#define AR9300_SIZE_ANT_COMMON_FIELD 4
#define AR9300_ANT_CHAIN_MASK 0x7
#define AR9300_ANT_COMMON_MASK 0xf
#define AR9300_CHAIN_0_IDX 0
#define AR9300_CHAIN_1_IDX 1
#define AR9300_CHAIN_2_IDX 2

#define AR928X_NUM_ANT_CHAIN_FIELDS 6
#define AR928X_SIZE_ANT_CHAIN_FIELD 2
#define AR928X_ANT_CHAIN_MASK 0x3

/* Delta from which to start power to pdadc table */
/* This offset is used in both open loop and closed loop power control
* schemes. In open loop power control, it is not really needed, but for
Expand All @@ -71,12 +40,8 @@
*/
#define AR9300_PWR_TABLE_OFFSET 0

/* enable flags for voltage and temp compensation */
#define ENABLE_TEMP_COMPENSATION 0x01
#define ENABLE_VOLT_COMPENSATION 0x02
/* byte addressable */
#define AR9300_EEPROM_SIZE (16*1024)
#define FIXED_CCA_THRESHOLD 15

#define AR9300_BASE_ADDR_4K 0xfff
#define AR9300_BASE_ADDR 0x3ff
Expand Down Expand Up @@ -226,7 +191,7 @@ struct ar9300_modal_eep_header {
int8_t tempSlope;
int8_t voltSlope;
/* spur channels in usual fbin coding format */
u8 spurChans[AR9300_EEPROM_MODAL_SPURS];
u8 spurChans[AR_EEPROM_MODAL_SPURS];
/* 3 Check if the register is per chain */
int8_t noiseFloorThreshCh[AR9300_MAX_CHAINS];
u8 ob[AR9300_MAX_CHAINS];
Expand Down
2 changes: 1 addition & 1 deletion trunk/drivers/net/wireless/ath/ath9k/eeprom.c
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Original file line number Diff line number Diff line change
Expand Up @@ -234,7 +234,7 @@ void ath9k_hw_get_target_powers(struct ath_hw *ah,
u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
bool is2GHz, int num_band_edges)
{
u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
u16 twiceMaxEdgePower = MAX_RATE_POWER;
int i;

for (i = 0; (i < num_band_edges) &&
Expand Down
45 changes: 10 additions & 35 deletions trunk/drivers/net/wireless/ath/ath9k/eeprom.h
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Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,8 @@
#ifndef EEPROM_H
#define EEPROM_H

#define AR_EEPROM_MODAL_SPURS 5

#include "../ath.h"
#include <net/cfg80211.h>
#include "ar9003_eeprom.h"
Expand Down Expand Up @@ -149,8 +151,6 @@
#define AR5416_NUM_PD_GAINS 4
#define AR5416_PD_GAINS_IN_MASK 4
#define AR5416_PD_GAIN_ICEPTS 5
#define AR5416_EEPROM_MODAL_SPURS 5
#define AR5416_MAX_RATE_POWER 63
#define AR5416_NUM_PDADC_VALUES 128
#define AR5416_BCHAN_UNUSED 0xFF
#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
Expand All @@ -175,8 +175,6 @@
#define AR5416_EEP4K_NUM_CTLS 12
#define AR5416_EEP4K_NUM_BAND_EDGES 4
#define AR5416_EEP4K_NUM_PD_GAINS 2
#define AR5416_EEP4K_PD_GAINS_IN_MASK 4
#define AR5416_EEP4K_PD_GAIN_ICEPTS 5
#define AR5416_EEP4K_MAX_CHAINS 1

#define AR9280_TX_GAIN_TABLE_SIZE 22
Expand All @@ -198,35 +196,12 @@
#define AR9287_NUM_2G_40_TARGET_POWERS 3
#define AR9287_NUM_CTLS 12
#define AR9287_NUM_BAND_EDGES 4
#define AR9287_NUM_PD_GAINS 4
#define AR9287_PD_GAINS_IN_MASK 4
#define AR9287_PD_GAIN_ICEPTS 1
#define AR9287_EEPROM_MODAL_SPURS 5
#define AR9287_MAX_RATE_POWER 63
#define AR9287_NUM_PDADC_VALUES 128
#define AR9287_NUM_RATES 16
#define AR9287_BCHAN_UNUSED 0xFF
#define AR9287_MAX_PWR_RANGE_IN_HALF_DB 64
#define AR9287_OPFLAGS_11A 0x01
#define AR9287_OPFLAGS_11G 0x02
#define AR9287_OPFLAGS_2G_HT40 0x08
#define AR9287_OPFLAGS_2G_HT20 0x20
#define AR9287_OPFLAGS_5G_HT40 0x04
#define AR9287_OPFLAGS_5G_HT20 0x10
#define AR9287_EEPMISC_BIG_ENDIAN 0x01
#define AR9287_EEPMISC_WOW 0x02
#define AR9287_MAX_CHAINS 2
#define AR9287_ANT_16S 32
#define AR9287_custdatasize 20

#define AR9287_NUM_ANT_CHAIN_FIELDS 6
#define AR9287_NUM_ANT_COMMON_FIELDS 4
#define AR9287_SIZE_ANT_CHAIN_FIELD 2
#define AR9287_SIZE_ANT_COMMON_FIELD 4
#define AR9287_ANT_CHAIN_MASK 0x3
#define AR9287_ANT_COMMON_MASK 0xf
#define AR9287_CHAIN_0_IDX 0
#define AR9287_CHAIN_1_IDX 1

#define AR9287_DATA_SZ 32

#define AR9287_PWR_TABLE_OFFSET_DB -5
Expand Down Expand Up @@ -396,7 +371,7 @@ struct modal_eep_header {
u16 xpaBiasLvlFreq[3];
u8 futureModal[6];

struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
} __packed;

struct calDataPerFreqOpLoop {
Expand Down Expand Up @@ -464,7 +439,7 @@ struct modal_eep_4k_header {
u8 db2_4:4, reserved:4;
#endif
u8 futureModal[4];
struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
} __packed;

struct base_eep_ar9287_header {
Expand Down Expand Up @@ -522,7 +497,7 @@ struct modal_eep_ar9287_header {
u8 ob_qam;
u8 ob_pal_off;
u8 futureModal[30];
struct spur_chan spurChans[AR9287_EEPROM_MODAL_SPURS];
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
} __packed;

struct cal_data_per_freq {
Expand All @@ -531,8 +506,8 @@ struct cal_data_per_freq {
} __packed;

struct cal_data_per_freq_4k {
u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_EEP4K_PD_GAIN_ICEPTS];
u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_EEP4K_PD_GAIN_ICEPTS];
u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
} __packed;

struct cal_target_power_leg {
Expand All @@ -558,8 +533,8 @@ struct cal_data_op_loop_ar9287 {
} __packed;

struct cal_data_per_freq_ar9287 {
u8 pwrPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
u8 vpdPdg[AR9287_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
} __packed;

union cal_data_per_freq_ar9287_u {
Expand Down
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