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yaml
---
r: 330726
b: refs/heads/master
c: 21dc61d
h: refs/heads/master
v: v3
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Devin Heitmueller authored and Mauro Carvalho Chehab committed Aug 9, 2012
1 parent 64dcd0e commit 9359fad
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Showing 3 changed files with 4 additions and 3 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 22d5c6f585352566ab4161d9aa7936100f94af05
refs/heads/master: 21dc61d3c0a4c0ee11e3e4a4e4888d4c71875b6d
4 changes: 2 additions & 2 deletions trunk/drivers/media/video/au0828/au0828-cards.c
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Expand Up @@ -46,7 +46,7 @@ struct au0828_board au0828_boards[] = {
.name = "Hauppauge HVR850",
.tuner_type = TUNER_XC5000,
.tuner_addr = 0x61,
.i2c_clk_divider = AU0828_I2C_CLK_30KHZ,
.i2c_clk_divider = AU0828_I2C_CLK_20KHZ,
.input = {
{
.type = AU0828_VMUX_TELEVISION,
Expand Down Expand Up @@ -77,7 +77,7 @@ struct au0828_board au0828_boards[] = {
stretch fits inside of a normal clock cycle, or else the
au0828 fails to set the STOP bit. A 30 KHz clock puts the
clock pulse width at 18us */
.i2c_clk_divider = AU0828_I2C_CLK_30KHZ,
.i2c_clk_divider = AU0828_I2C_CLK_20KHZ,
.input = {
{
.type = AU0828_VMUX_TELEVISION,
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1 change: 1 addition & 0 deletions trunk/drivers/media/video/au0828/au0828-reg.h
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Expand Up @@ -63,3 +63,4 @@
#define AU0828_I2C_CLK_250KHZ 0x07
#define AU0828_I2C_CLK_100KHZ 0x14
#define AU0828_I2C_CLK_30KHZ 0x40
#define AU0828_I2C_CLK_20KHZ 0x60

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