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Blackfin arch: do not allow L2 to be cached on BF561 SMP
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Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Mike Frysinger authored and Bryan Wu committed Jan 7, 2009
1 parent 1ea9925 commit 94106e0
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2 changes: 1 addition & 1 deletion arch/blackfin/Kconfig
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Expand Up @@ -866,7 +866,7 @@ endchoice

config BFIN_L2_CACHEABLE
bool "Cache L2 SRAM"
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
default n
help
Select to make L2 SRAM cacheable in L1 data and instruction cache.
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