---

yaml
---
r: 282757
b: refs/heads/master
c: 400a28a
h: refs/heads/master
i:
  282755: 882b5be
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: cbc33a9085995e21f52a66380d108d64916b6787
+refs/heads/master: 400a28a05f2cc1a311acb4ff6ac64d8402d21678

trunk/drivers/iommu/amd_iommu_init.c

@@ -25,6 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/msi.h>
 #include <linux/amd-iommu.h>
+#include <linux/export.h>
 #include <asm/pci-direct.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
@@ -143,6 +144,8 @@ bool amd_iommu_iotlb_sup __read_mostly = true;
 
 u32 amd_iommu_max_pasids __read_mostly = ~0;
 
+bool amd_iommu_v2_present __read_mostly;
+
 /*
  * The ACPI table parsing functions set this variable on an error
  */
@@ -760,6 +763,12 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
 		amd_iommu_max_pasids = min(amd_iommu_max_pasids, pasids);
 	}
 
+	if (iommu_feature(iommu, FEATURE_GT) &&
+	    iommu_feature(iommu, FEATURE_PPR)) {
+		iommu->is_iommu_v2   = true;
+		amd_iommu_v2_present = true;
+	}
+
 	if (!is_rd890_iommu(iommu->dev))
 		return;
 
@@ -1645,3 +1654,9 @@ IOMMU_INIT_FINISH(amd_iommu_detect,
 		  gart_iommu_hole_init,
 		  0,
 		  0);
+
+bool amd_iommu_v2_supported(void)
+{
+	return amd_iommu_v2_present;
+}
+EXPORT_SYMBOL(amd_iommu_v2_supported);

trunk/drivers/iommu/amd_iommu_proto.h

@@ -31,6 +31,9 @@ extern int amd_iommu_init_devices(void);
 extern void amd_iommu_uninit_devices(void);
 extern void amd_iommu_init_notifier(void);
 extern void amd_iommu_init_api(void);
+
+extern bool amd_iommu_v2_supported(void);
+
 #ifndef CONFIG_AMD_IOMMU_STATS
 
 static inline void amd_iommu_stats_init(void) { }

trunk/drivers/iommu/amd_iommu_types.h

@@ -414,6 +414,9 @@ struct amd_iommu {
 	/* Extended features */
 	u64 features;
 
+	/* IOMMUv2 */
+	bool is_iommu_v2;
+
 	/*
 	 * Capability pointer. There could be more than one IOMMU per PCI
 	 * device function if there are more than one AMD IOMMU capability
@@ -570,6 +573,8 @@ extern bool amd_iommu_unmap_flush;
 /* Smallest number of PASIDs supported by any IOMMU in the system */
 extern u32 amd_iommu_max_pasids;
 
+extern bool amd_iommu_v2_present;
+
 /* takes bus and device/function and returns the device id
  * FIXME: should that be in generic PCI code? */
 static inline u16 calc_devid(u8 bus, u8 devfn)