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yaml --- r: 137395 b: refs/heads/master c: 569106c h: refs/heads/master i: 137393: 7da6cc2 137391: f9f82b4 v: v3
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Lennert Buytenhek
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Nicolas Pitre
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Mar 16, 2009
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refs/heads/master: 698fe13b215ec6b956e867dcbc4a4c0992a61ca2 | ||
refs/heads/master: 569106c70e49ad67c69fa7d43a2a5218e63a4619 |
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obj-y += common.o addr-map.o irq.o pcie.o | ||
obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o | ||
obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o |
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/* | ||
* arch/arm/mach-mv78x00/rd78x00-masa-setup.c | ||
* | ||
* Marvell RD-78x00-mASA Development Board Setup | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/init.h> | ||
#include <linux/platform_device.h> | ||
#include <linux/ata_platform.h> | ||
#include <linux/mv643xx_eth.h> | ||
#include <linux/ethtool.h> | ||
#include <mach/mv78xx0.h> | ||
#include <asm/mach-types.h> | ||
#include <asm/mach/arch.h> | ||
#include "common.h" | ||
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static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = { | ||
.phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
}; | ||
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static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = { | ||
.phy_addr = MV643XX_ETH_PHY_ADDR(9), | ||
}; | ||
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static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = { | ||
}; | ||
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static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = { | ||
}; | ||
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static struct mv_sata_platform_data rd78x00_masa_sata_data = { | ||
.n_ports = 2, | ||
}; | ||
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static void __init rd78x00_masa_init(void) | ||
{ | ||
/* | ||
* Basic MV78x00 setup. Needs to be called early. | ||
*/ | ||
mv78xx0_init(); | ||
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/* | ||
* Partition on-chip peripherals between the two CPU cores. | ||
*/ | ||
if (mv78xx0_core_index() == 0) { | ||
mv78xx0_ehci0_init(); | ||
mv78xx0_ehci1_init(); | ||
mv78xx0_ge00_init(&rd78x00_masa_ge00_data); | ||
mv78xx0_ge10_init(&rd78x00_masa_ge10_data); | ||
mv78xx0_sata_init(&rd78x00_masa_sata_data); | ||
mv78xx0_uart0_init(); | ||
mv78xx0_uart2_init(); | ||
} else { | ||
mv78xx0_ehci2_init(); | ||
mv78xx0_ge01_init(&rd78x00_masa_ge01_data); | ||
mv78xx0_ge11_init(&rd78x00_masa_ge11_data); | ||
mv78xx0_uart1_init(); | ||
mv78xx0_uart3_init(); | ||
} | ||
} | ||
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static int __init rd78x00_pci_init(void) | ||
{ | ||
/* | ||
* Assign all PCIe devices to CPU core #0. | ||
*/ | ||
if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0) | ||
mv78xx0_pcie_init(1, 1); | ||
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return 0; | ||
} | ||
subsys_initcall(rd78x00_pci_init); | ||
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MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") | ||
/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ | ||
.phys_io = MV78XX0_REGS_PHYS_BASE, | ||
.io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc, | ||
.boot_params = 0x00000100, | ||
.init_machine = rd78x00_masa_init, | ||
.map_io = mv78xx0_map_io, | ||
.init_irq = mv78xx0_init_irq, | ||
.timer = &mv78xx0_timer, | ||
MACHINE_END |