---

yaml --- r: 281925 b: refs/heads/master c: 010dc8a h: refs/heads/master i: 281923: 987c841 v: v3
git-mirror · Dec 25, 2011 · 9525f60 · 9525f60
1 parent f445bb1
commit 9525f60
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diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5d3cb0ffdd0c8987dc17a2ef4529b246198ceb72
+refs/heads/master: 010dc8af8f283cc04b7d8f8844f01dd90eca69e5
diff --git a/trunk/Documentation/arm/memory.txt b/trunk/Documentation/arm/memory.txt
@@ -51,14 +51,15 @@ ffc00000	ffefffff	DMA memory mapping region.  Memory returned
 ff000000	ffbfffff	Reserved for future expansion of DMA
 				mapping region.
 
+VMALLOC_END	feffffff	Free for platform use, recommended.
+				VMALLOC_END must be aligned to a 2MB
+				boundary.
+
 VMALLOC_START	VMALLOC_END-1	vmalloc() / ioremap() space.
 				Memory returned by vmalloc/ioremap will
 				be dynamically placed in this region.
-				Machine specific static mappings are also
-				located here through iotable_init().
-				VMALLOC_START is based upon the value
-				of the high_memory variable, and VMALLOC_END
-				is equal to 0xff000000.
+				VMALLOC_START may be based upon the value
+				of the high_memory variable.
 
 PAGE_OFFSET	high_memory-1	Kernel direct-mapped RAM region.
 				This maps the platforms RAM, and typically

diff --git a/trunk/Documentation/devicetree/bindings/arm/gic.txt b/trunk/Documentation/devicetree/bindings/arm/gic.txt
@@ -42,10 +42,6 @@ Optional
 - interrupts	: Interrupt source of the parent interrupt controller. Only
   present on secondary GICs.
 
-- cpu-offset	: per-cpu offset within the distributor and cpu interface
-  regions, used when the GIC doesn't have banked registers. The offset is
-  cpu-offset * cpu-nr.
-
 Example:
 
 	intc: interrupt-controller@fff11000 {

diff --git a/trunk/Documentation/devicetree/bindings/arm/vic.txt b/trunk/Documentation/devicetree/bindings/arm/vic.txt
diff --git a/trunk/Documentation/devicetree/bindings/serial/omap_serial.txt b/trunk/Documentation/devicetree/bindings/serial/omap_serial.txt
diff --git a/trunk/arch/arm/boot/dts/omap2.dtsi b/trunk/arch/arm/boot/dts/omap2.dtsi
diff --git a/trunk/arch/arm/boot/dts/omap3.dtsi b/trunk/arch/arm/boot/dts/omap3.dtsi
@@ -13,13 +13,6 @@
 / {
 	compatible = "ti,omap3430", "ti,omap3";
 
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-	};
-
 	cpus {
 		cpu@0 {
 			compatible = "arm,cortex-a8";
@@ -66,29 +59,5 @@
 			interrupt-controller;
 			#interrupt-cells = <1>;
 		};
-
-		uart1: serial@0x4806a000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@0x4806c000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@0x49020000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-
-		uart4: serial@0x49042000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart4";
-			clock-frequency = <48000000>;
-		};
 	};
 };
diff --git a/trunk/arch/arm/boot/dts/omap4.dtsi b/trunk/arch/arm/boot/dts/omap4.dtsi
@@ -21,10 +21,6 @@
 	interrupt-parent = <&gic>;
 
 	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
 	};
 
 	cpus {
@@ -103,29 +99,5 @@
 			reg = <0x48241000 0x1000>,
 			      <0x48240100 0x0100>;
 		};
-
-		uart1: serial@0x4806a000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@0x4806c000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@0x48020000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-
-		uart4: serial@0x4806e000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart4";
-			clock-frequency = <48000000>;
-		};
 	};
 };
diff --git a/trunk/arch/arm/common/Kconfig b/trunk/arch/arm/common/Kconfig
@@ -1,14 +1,8 @@
 config ARM_GIC
 	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
-	bool
-
-config GIC_NON_BANKED
 	bool
 
 config ARM_VIC
-	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
 	bool
 
 config ARM_VIC_NR