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yaml
---
r: 283591
b: refs/heads/master
c: 33dc5c1
h: refs/heads/master
i:
  283589: 33f8e4b
  283587: 6d4c5e6
  283583: 51e92da
v: v3
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Paul Mundt committed Jan 10, 2012
1 parent 1860775 commit 952818c
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Showing 17 changed files with 180 additions and 591 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 4414d38a8845b229a8e7ea0105fe1bb263b65993
refs/heads/master: 33dc5c1000c193084a70ffd8f3bd9c67d19f9159
6 changes: 3 additions & 3 deletions trunk/arch/arm/mach-shmobile/clock-sh7372.c
Original file line number Diff line number Diff line change
Expand Up @@ -411,11 +411,11 @@ static struct clk *fsibckcr_parent[] = {
};

static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
[DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
[DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0,
hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
[DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
[DIV6_FSIA] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIACKCR, 0,
fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
[DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
[DIV6_FSIB] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIBCKCR, 0,
fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
};

Expand Down
140 changes: 22 additions & 118 deletions trunk/arch/arm/mach-shmobile/clock-sh73a0.c
Original file line number Diff line number Diff line change
Expand Up @@ -92,24 +92,6 @@ static struct clk_ops div2_clk_ops = {
.recalc = div2_recalc,
};

static unsigned long div7_recalc(struct clk *clk)
{
return clk->parent->rate / 7;
}

static struct clk_ops div7_clk_ops = {
.recalc = div7_recalc,
};

static unsigned long div13_recalc(struct clk *clk)
{
return clk->parent->rate / 13;
}

static struct clk_ops div13_clk_ops = {
.recalc = div13_recalc,
};

/* Divide extal1 by two */
static struct clk extal1_div2_clk = {
.ops = &div2_clk_ops,
Expand Down Expand Up @@ -192,29 +174,12 @@ static struct clk pll3_clk = {
.enable_bit = 3,
};

/* Divide PLL */
/* Divide PLL1 by two */
static struct clk pll1_div2_clk = {
.ops = &div2_clk_ops,
.parent = &pll1_clk,
};

static struct clk pll1_div7_clk = {
.ops = &div7_clk_ops,
.parent = &pll1_clk,
};

static struct clk pll1_div13_clk = {
.ops = &div13_clk_ops,
.parent = &pll1_clk,
};

/* External input clock */
struct clk sh73a0_extcki_clk = {
};

struct clk sh73a0_extalr_clk = {
};

static struct clk *main_clks[] = {
&r_clk,
&sh73a0_extal1_clk,
Expand All @@ -228,10 +193,6 @@ static struct clk *main_clks[] = {
&pll2_clk,
&pll3_clk,
&pll1_div2_clk,
&pll1_div7_clk,
&pll1_div13_clk,
&sh73a0_extcki_clk,
&sh73a0_extalr_clk,
};

static void div4_kick(struct clk *clk)
Expand Down Expand Up @@ -285,84 +246,27 @@ enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
DIV6_NR };

static struct clk *vck_parent[8] = {
[0] = &pll1_div2_clk,
[1] = &pll2_clk,
[2] = &sh73a0_extcki_clk,
[3] = &sh73a0_extal2_clk,
[4] = &main_div2_clk,
[5] = &sh73a0_extalr_clk,
[6] = &main_clk,
};

static struct clk *pll_parent[4] = {
[0] = &pll1_div2_clk,
[1] = &pll2_clk,
[2] = &pll1_div13_clk,
};

static struct clk *hsi_parent[4] = {
[0] = &pll1_div2_clk,
[1] = &pll2_clk,
[2] = &pll1_div7_clk,
};

static struct clk *pll_extal2_parent[] = {
[0] = &pll1_div2_clk,
[1] = &pll2_clk,
[2] = &sh73a0_extal2_clk,
[3] = &sh73a0_extal2_clk,
};

static struct clk *dsi_parent[8] = {
[0] = &pll1_div2_clk,
[1] = &pll2_clk,
[2] = &main_clk,
[3] = &sh73a0_extal2_clk,
[4] = &sh73a0_extcki_clk,
};

static struct clk div6_clks[DIV6_NR] = {
[DIV6_VCK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
[DIV6_VCK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
[DIV6_VCK3] = SH_CLK_DIV6_EXT(VCLKCR3, 0,
vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
[DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, CLK_ENABLE_ON_INIT,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_FLCTL] = SH_CLK_DIV6_EXT(FLCKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_SDHI0] = SH_CLK_DIV6_EXT(SD0CKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
[DIV6_SDHI1] = SH_CLK_DIV6_EXT(SD1CKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
[DIV6_SDHI2] = SH_CLK_DIV6_EXT(SD2CKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
[DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
[DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
[DIV6_SUB] = SH_CLK_DIV6_EXT(SUBCKCR, 0,
pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
[DIV6_SPUA] = SH_CLK_DIV6_EXT(SPUACKCR, 0,
pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
[DIV6_SPUV] = SH_CLK_DIV6_EXT(SPUVCKCR, 0,
pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
[DIV6_MSU] = SH_CLK_DIV6_EXT(MSUCKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_HSI] = SH_CLK_DIV6_EXT(HSICKCR, 0,
hsi_parent, ARRAY_SIZE(hsi_parent), 6, 2),
[DIV6_MFG1] = SH_CLK_DIV6_EXT(MFCK1CR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_MFG2] = SH_CLK_DIV6_EXT(MFCK2CR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_DSIT] = SH_CLK_DIV6_EXT(DSITCKCR, 0,
pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
[DIV6_DSI0P] = SH_CLK_DIV6_EXT(DSI0PCKCR, 0,
dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
[DIV6_DSI1P] = SH_CLK_DIV6_EXT(DSI1PCKCR, 0,
dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
[DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
[DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
[DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
[DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
[DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
[DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
[DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
[DIV6_SDHI2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
[DIV6_FSIA] = SH_CLK_DIV6(&pll1_div2_clk, FSIACKCR, 0),
[DIV6_FSIB] = SH_CLK_DIV6(&pll1_div2_clk, FSIBCKCR, 0),
[DIV6_SUB] = SH_CLK_DIV6(&sh73a0_extal2_clk, SUBCKCR, 0),
[DIV6_SPUA] = SH_CLK_DIV6(&pll1_div2_clk, SPUACKCR, 0),
[DIV6_SPUV] = SH_CLK_DIV6(&pll1_div2_clk, SPUVCKCR, 0),
[DIV6_MSU] = SH_CLK_DIV6(&pll1_div2_clk, MSUCKCR, 0),
[DIV6_HSI] = SH_CLK_DIV6(&pll1_div2_clk, HSICKCR, 0),
[DIV6_MFG1] = SH_CLK_DIV6(&pll1_div2_clk, MFCK1CR, 0),
[DIV6_MFG2] = SH_CLK_DIV6(&pll1_div2_clk, MFCK2CR, 0),
[DIV6_DSIT] = SH_CLK_DIV6(&pll1_div2_clk, DSITCKCR, 0),
[DIV6_DSI0P] = SH_CLK_DIV6(&pll1_div2_clk, DSI0PCKCR, 0),
[DIV6_DSI1P] = SH_CLK_DIV6(&pll1_div2_clk, DSI1PCKCR, 0),
};

enum { MSTP001,
Expand Down Expand Up @@ -499,7 +403,7 @@ void __init sh73a0_clock_init(void)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);

if (!ret)
ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
ret = sh_clk_div6_register(div6_clks, DIV6_NR);

if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
Expand Down
2 changes: 0 additions & 2 deletions trunk/arch/arm/mach-shmobile/include/mach/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,6 @@ extern void sh73a0_clock_init(void);
extern void sh73a0_pinmux_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
extern struct clk sh73a0_extcki_clk;
extern struct clk sh73a0_extalr_clk;

extern unsigned int sh73a0_get_core_count(void);
extern void sh73a0_secondary_init(unsigned int cpu);
Expand Down
39 changes: 0 additions & 39 deletions trunk/arch/sh/boards/board-sh7757lcr.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,6 @@
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/sh_eth.h>
#include <linux/usb/renesas_usbhs.h>
#include <cpu/sh7757.h>
#include <asm/heartbeat.h>

Expand Down Expand Up @@ -265,43 +264,6 @@ static struct platform_device sdhi_device = {
},
};

static int usbhs0_get_id(struct platform_device *pdev)
{
return USBHS_GADGET;
}

static struct renesas_usbhs_platform_info usb0_data = {
.platform_callback = {
.get_id = usbhs0_get_id,
},
.driver_param = {
.buswait_bwait = 5,
}
};

static struct resource usb0_resources[] = {
[0] = {
.start = 0xfe450000,
.end = 0xfe4501ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 50,
.end = 50,
.flags = IORESOURCE_IRQ,
},
};

static struct platform_device usb0_device = {
.name = "renesas_usbhs",
.id = 0,
.dev = {
.platform_data = &usb0_data,
},
.num_resources = ARRAY_SIZE(usb0_resources),
.resource = usb0_resources,
};

static struct platform_device *sh7757lcr_devices[] __initdata = {
&heartbeat_device,
&sh7757_eth0_device,
Expand All @@ -310,7 +272,6 @@ static struct platform_device *sh7757lcr_devices[] __initdata = {
&sh7757_eth_giga1_device,
&sh_mmcif_device,
&sdhi_device,
&usb0_device,
};

static struct flash_platform_data spi_flash_data = {
Expand Down
1 change: 0 additions & 1 deletion trunk/arch/sh/include/cpu-sh4/cpu/sh7724.h
Original file line number Diff line number Diff line change
Expand Up @@ -314,6 +314,5 @@ enum {

extern struct clk sh7724_fsimcka_clk;
extern struct clk sh7724_fsimckb_clk;
extern struct clk sh7724_dv_clki;

#endif /* __ASM_SH7724_H__ */
8 changes: 4 additions & 4 deletions trunk/arch/sh/kernel/cpu/sh4/sq.c
Original file line number Diff line number Diff line change
Expand Up @@ -337,7 +337,7 @@ static struct kobj_type ktype_percpu_entry = {
.default_attrs = sq_sysfs_attrs,
};

static int __devinit sq_dev_add(struct device *dev)
static int sq_dev_add(struct device *dev, struct subsys_interface *sif)
{
unsigned int cpu = dev->id;
struct kobject *kobj;
Expand All @@ -355,7 +355,7 @@ static int __devinit sq_dev_add(struct device *dev)
return error;
}

static int __devexit sq_dev_remove(struct device *dev)
static int sq_dev_remove(struct device *dev, struct subsys_interface *sif)
{
unsigned int cpu = dev->id;
struct kobject *kobj = sq_kobject[cpu];
Expand All @@ -365,10 +365,10 @@ static int __devexit sq_dev_remove(struct device *dev)
}

static struct subsys_interface sq_interface = {
.name = "sq"
.name = "sq",
.subsys = &cpu_subsys,
.add_dev = sq_dev_add,
.remove_dev = __devexit_p(sq_dev_remove),
.remove_dev = sq_dev_remove,
};

static int __init sq_api_init(void)
Expand Down
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