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yaml --- r: 338456 b: refs/heads/master c: d02f815 h: refs/heads/master v: v3
git-mirror · Nov 22, 2012 · 96052fb · 96052fb
1 parent 3eb4a05
commit 96052fb
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Showing 2 changed files with 14 additions and 2 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1cd3f2d2c99892209c4751155ae56ff18b1b253e
+refs/heads/master: d02f81555362e0032080af62154dca00d5ec99e0
diff --git a/trunk/include/uapi/linux/serial_reg.h b/trunk/include/uapi/linux/serial_reg.h
@@ -368,10 +368,22 @@
 #define UART_OMAP_MDR1_DISABLE		0x07	/* Disable (default state) */
 
 /*
- * These are definitions for the XR17V35X and XR17D15X
+ * These are definitions for the Exar XR17V35X and XR17(C|D)15X
  */
+#define UART_EXAR_8XMODE	0x88	/* 8X sampling rate select */
 #define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
 #define UART_EXAR_DVID		0x8d	/* Device identification */
 
+#define UART_EXAR_FCTR		0x08	/* Feature Control Register */
+#define UART_FCTR_EXAR_IRDA	0x08	/* IrDa data encode select */
+#define UART_FCTR_EXAR_485	0x10	/* Auto 485 half duplex dir ctl */
+#define UART_FCTR_EXAR_TRGA	0x00	/* FIFO trigger table A */
+#define UART_FCTR_EXAR_TRGB	0x60	/* FIFO trigger table B */
+#define UART_FCTR_EXAR_TRGC	0x80	/* FIFO trigger table C */
+#define UART_FCTR_EXAR_TRGD	0xc0	/* FIFO trigger table D programmable */
+
+#define UART_EXAR_TXTRG		0x0a	/* Tx FIFO trigger level write-only */
+#define UART_EXAR_RXTRG		0x0b	/* Rx FIFO trigger level write-only */
+
 #endif /* _LINUX_SERIAL_REG_H */