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r: 296604
b: refs/heads/master
c: 4ee1c57
h: refs/heads/master
v: v3
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Roland Stigge authored and Olof Johansson committed Feb 9, 2012
1 parent 7b468d0 commit 9636631
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: f6175f228cc8dab421e762158ad40f5614b18941
refs/heads/master: 4ee1c5716d10e30269b64e393cc4a5bf17afee38
12 changes: 2 additions & 10 deletions trunk/Documentation/DocBook/device-drivers.tmpl
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Expand Up @@ -102,12 +102,9 @@ X!Iinclude/linux/kobject.h
!Iinclude/linux/device.h
</sect1>
<sect1><title>Device Drivers Base</title>
!Idrivers/base/init.c
!Edrivers/base/driver.c
!Edrivers/base/core.c
!Edrivers/base/syscore.c
!Edrivers/base/class.c
!Idrivers/base/node.c
!Edrivers/base/firmware_class.c
!Edrivers/base/transport_class.c
<!-- Cannot be included, because
Expand All @@ -116,18 +113,13 @@ X!Iinclude/linux/kobject.h
exceed allowed 44 characters maximum
X!Edrivers/base/attribute_container.c
-->
!Edrivers/base/dd.c
!Edrivers/base/sys.c
<!--
X!Edrivers/base/interface.c
-->
!Iinclude/linux/platform_device.h
!Edrivers/base/platform.c
!Edrivers/base/bus.c
</sect1>
<sect1><title>Device Drivers DMA Management</title>
!Edrivers/base/dma-buf.c
!Edrivers/base/dma-coherent.c
!Edrivers/base/dma-mapping.c
</sect1>
<sect1><title>Device Drivers Power Management</title>
!Edrivers/base/power/main.c
Expand Down Expand Up @@ -227,7 +219,7 @@ X!Isound/sound_firmware.c
<chapter id="uart16x50">
<title>16x50 UART Driver</title>
!Edrivers/tty/serial/serial_core.c
!Edrivers/tty/serial/8250/8250.c
!Edrivers/tty/serial/8250.c
</chapter>

<chapter id="fbdev">
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117 changes: 0 additions & 117 deletions trunk/Documentation/IRQ-domain.txt

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100 changes: 0 additions & 100 deletions trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt

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30 changes: 0 additions & 30 deletions trunk/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt

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36 changes: 2 additions & 34 deletions trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
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NVIDIA Tegra GPIO controller
NVIDIA Tegra 2 GPIO controller

Required properties:
- compatible : "nvidia,tegra<chip>-gpio"
- reg : Physical base address and length of the controller's registers.
- interrupts : The interrupt outputs from the controller. For Tegra20,
there should be 7 interrupts specified, and for Tegra30, there should
be 8 interrupts specified.
- compatible : "nvidia,tegra20-gpio"
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters:
- bit 0 specifies polarity (0 for normal, 1 for inverted)
- gpio-controller : Marks the device node as a GPIO controller.
- #interrupt-cells : Should be 2.
The first cell is the GPIO number.
The second cell is used to specify flags:
bits[3:0] trigger type and level flags:
1 = low-to-high edge triggered.
2 = high-to-low edge triggered.
4 = active high level-sensitive.
8 = active low level-sensitive.
Valid combinations are 1, 2, 3, 4, 8.
- interrupt-controller : Marks the device node as an interrupt controller.

Example:

gpio: gpio@6000d000 {
compatible = "nvidia,tegra20-gpio";
reg = < 0x6000d000 0x1000 >;
interrupts = < 0 32 0x04
0 33 0x04
0 34 0x04
0 35 0x04
0 55 0x04
0 87 0x04
0 89 0x04 >;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
};
14 changes: 14 additions & 0 deletions trunk/Documentation/feature-removal-schedule.txt
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Expand Up @@ -510,3 +510,17 @@ Why: The pci_scan_bus_parented() interface creates a new root bus. The
convert to using pci_scan_root_bus() so they can supply a list of
bus resources when the bus is created.
Who: Bjorn Helgaas <bhelgaas@google.com>

----------------------------

What: The CAP9 SoC family will be removed
When: 3.4
Files: arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91cap9_devices.c
arch/arm/mach-at91/include/mach/at91cap9.h
arch/arm/mach-at91/include/mach/at91cap9_matrix.h
arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
arch/arm/mach-at91/board-cap9adk.c
Why: The code is not actively maintained and platforms are now hard to find.
Who: Nicolas Ferre <nicolas.ferre@atmel.com>
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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