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yaml --- r: 369203 b: refs/heads/master c: 16e3d96 h: refs/heads/master i: 369201: d832c38 369199: d45bf13 v: v3
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David S. Miller
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Apr 11, 2013
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--- | ||
refs/heads/master: 05600a799f6c67b139f2bc565e358b913b230cf5 | ||
refs/heads/master: 16e3d9648add0b3839587fd77f510537baf88c3a |
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Network classifier cgroup | ||
------------------------- | ||
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The Network classifier cgroup provides an interface to | ||
tag network packets with a class identifier (classid). | ||
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The Traffic Controller (tc) can be used to assign | ||
different priorities to packets from different cgroups. | ||
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Creating a net_cls cgroups instance creates a net_cls.classid file. | ||
This net_cls.classid value is initialized to 0. | ||
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You can write hexadecimal values to net_cls.classid; the format for these | ||
values is 0xAAAABBBB; AAAA is the major handle number and BBBB | ||
is the minor handle number. | ||
Reading net_cls.classid yields a decimal result. | ||
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Example: | ||
mkdir /sys/fs/cgroup/net_cls | ||
mount -t cgroup -onet_cls net_cls /sys/fs/cgroup/net_cls | ||
mkdir /sys/fs/cgroup/net_cls/0 | ||
echo 0x100001 > /sys/fs/cgroup/net_cls/0/net_cls.classid | ||
- setting a 10:1 handle. | ||
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cat /sys/fs/cgroup/net_cls/0/net_cls.classid | ||
1048577 | ||
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configuring tc: | ||
tc qdisc add dev eth0 root handle 10: htb | ||
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tc class add dev eth0 parent 10: classid 10:1 htb rate 40mbit | ||
- creating traffic class 10:1 | ||
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tc filter add dev eth0 parent 10: protocol ip prio 10 handle 1: cgroup |
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trunk/Documentation/devicetree/bindings/net/can/atmel-can.txt
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* AT91 CAN * | ||
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Required properties: | ||
- compatible: Should be "atmel,at91sam9263-can" or "atmel,at91sam9x5-can" | ||
- reg: Should contain CAN controller registers location and length | ||
- interrupts: Should contain IRQ line for the CAN controller | ||
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Example: | ||
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can0: can@f000c000 { | ||
compatbile = "atmel,at91sam9x5-can"; | ||
reg = <0xf000c000 0x300>; | ||
interrupts = <40 4 5> | ||
}; |
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Marvell Distributed Switch Architecture Device Tree Bindings | ||
------------------------------------------------------------ | ||
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Required properties: | ||
- compatible : Should be "marvell,dsa" | ||
- #address-cells : Must be 2, first cell is the address on the MDIO bus | ||
and second cell is the address in the switch tree. | ||
Second cell is used only when cascading/chaining. | ||
- #size-cells : Must be 0 | ||
- dsa,ethernet : Should be a phandle to a valid Ethernet device node | ||
- dsa,mii-bus : Should be a phandle to a valid MDIO bus device node | ||
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Optionnal properties: | ||
- interrupts : property with a value describing the switch | ||
interrupt number (not supported by the driver) | ||
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A DSA node can contain multiple switch chips which are therefore child nodes of | ||
the parent DSA node. The maximum number of allowed child nodes is 4 | ||
(DSA_MAX_SWITCHES). | ||
Each of these switch child nodes should have the following required properties: | ||
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- reg : Describes the switch address on the MII bus | ||
- #address-cells : Must be 1 | ||
- #size-cells : Must be 0 | ||
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A switch may have multiple "port" children nodes | ||
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Each port children node must have the following mandatory properties: | ||
- reg : Describes the port address in the switch | ||
- label : Describes the label associated with this port, special | ||
labels are "cpu" to indicate a CPU port and "dsa" to | ||
indicate an uplink/downlink port. | ||
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Note that a port labelled "dsa" will imply checking for the uplink phandle | ||
described below. | ||
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Optionnal property: | ||
- link : Should be a phandle to another switch's DSA port. | ||
This property is only used when switches are being | ||
chained/cascaded together. | ||
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Example: | ||
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dsa@0 { | ||
compatible = "marvell,dsa"; | ||
#address-cells = <2>; | ||
#size-cells = <0>; | ||
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interrupts = <10>; | ||
dsa,ethernet = <ðernet0>; | ||
dsa,mii-bus = <&mii_bus0>; | ||
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switch@0 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
reg = <16 0>; /* MDIO address 16, switch 0 in tree */ | ||
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port@0 { | ||
reg = <0>; | ||
label = "lan1"; | ||
}; | ||
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port@1 { | ||
reg = <1>; | ||
label = "lan2"; | ||
}; | ||
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port@5 { | ||
reg = <5>; | ||
label = "cpu"; | ||
}; | ||
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switch0uplink: port@6 { | ||
reg = <6>; | ||
label = "dsa"; | ||
link = <&switch1uplink>; | ||
}; | ||
}; | ||
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switch@1 { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
reg = <17 1>; /* MDIO address 17, switch 1 in tree */ | ||
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switch1uplink: port@0 { | ||
reg = <0>; | ||
label = "dsa"; | ||
link = <&switch0uplink>; | ||
}; | ||
}; | ||
}; |
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