---

yaml
---
r: 250652
b: refs/heads/master
c: d11db27
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a0b1de84fed49a055a3ecbfab67ff9cdea81aa6f
+refs/heads/master: d11db279014e881da9f5259c963501b33a413929

trunk/drivers/gpu/drm/nouveau/nouveau_drv.h

@@ -1155,13 +1155,8 @@ extern int  nv04_graph_mthd_page_flip(struct nouveau_channel *chan,
 extern struct nouveau_bitfield nv04_graph_nsource[];
 
 /* nv10_graph.c */
-extern int  nv10_graph_init(struct drm_device *);
-extern void nv10_graph_takedown(struct drm_device *);
+extern int  nv10_graph_create(struct drm_device *);
 extern struct nouveau_channel *nv10_graph_channel(struct drm_device *);
-extern int  nv10_graph_create_context(struct nouveau_channel *);
-extern void nv10_graph_destroy_context(struct nouveau_channel *);
-extern int  nv10_graph_load_context(struct nouveau_channel *);
-extern int  nv10_graph_unload_context(struct drm_device *);
 extern void nv10_graph_set_tile_region(struct drm_device *dev, int i);
 extern struct nouveau_bitfield nv10_graph_intr[];
 extern struct nouveau_bitfield nv10_graph_nstatus[];

trunk/drivers/gpu/drm/nouveau/nouveau_state.c

@@ -122,15 +122,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
 		engine->fb.init_tile_region	= nv10_fb_init_tile_region;
 		engine->fb.set_tile_region	= nv10_fb_set_tile_region;
 		engine->fb.free_tile_region	= nv10_fb_free_tile_region;
-		engine->graph.init		= nv10_graph_init;
-		engine->graph.takedown		= nv10_graph_takedown;
-		engine->graph.channel		= nv10_graph_channel;
-		engine->graph.create_context	= nv10_graph_create_context;
-		engine->graph.destroy_context	= nv10_graph_destroy_context;
-		engine->graph.fifo_access	= nv04_graph_fifo_access;
-		engine->graph.load_context	= nv10_graph_load_context;
-		engine->graph.unload_context	= nv10_graph_unload_context;
-		engine->graph.object_new	= nv04_graph_object_new;
+		engine->graph.init		= nouveau_stub_init;
+		engine->graph.takedown		= nouveau_stub_takedown;
+		engine->graph.channel		= nvc0_graph_channel;
+		engine->graph.fifo_access	= nvc0_graph_fifo_access;
 		engine->graph.set_tile_region	= nv10_graph_set_tile_region;
 		engine->fifo.channels		= 32;
 		engine->fifo.init		= nv10_fifo_init;
@@ -604,6 +599,9 @@ nouveau_card_init(struct drm_device *dev)
 		goto out_timer;
 
 	switch (dev_priv->card_type) {
+	case NV_10:
+		nv10_graph_create(dev);
+		break;
 	case NV_20:
 	case NV_30:
 		nv20_graph_create(dev);